Michael Rogenmoser
4b8bebae9a
Add DMR performance section code
2023-08-04 14:20:05 +02:00
Michael Rogenmoser
f754455e34
Add performance section code
2023-08-02 17:30:16 +02:00
Michael Rogenmoser
5e8e693242
Add optional define guards to avoid unnecessary code
2023-02-20 08:56:34 +01:00
Michael Rogenmoser
63f83901ef
Add SW for DMR critical section
2023-02-16 13:53:16 +01:00
Michael Rogenmoser
90a4c57a42
Update critical section code for functionality
2023-02-10 11:16:38 +01:00
Yvan Tortorella
10208561c0
Enabling 12 cores on the cluster.
2023-02-08 13:52:21 +01:00
Michael Rogenmoser
2824f98dcc
Add code to execute a critical section
2023-02-06 19:24:10 +01:00
Michael Rogenmoser
d7599d8b68
Update sp storage register
2023-02-03 13:53:27 +01:00
Michael Rogenmoser
3a48d6e1a1
HMR: Add config helper functions
2023-02-01 11:30:10 +01:00
Michael Rogenmoser
640012a0ea
HMR: update register header file
2023-02-01 08:43:35 +01:00
Michael Rogenmoser
a98e69e78d
HMR: Add/fix dmr support code
2023-01-31 18:03:04 +01:00
Michael Rogenmoser
8403754789
Add initial TMR resynchronization
2023-01-26 18:29:34 +01:00
Michael Rogenmoser
776c856d63
Add initial HMR software config
2023-01-19 13:23:02 +01:00
Michael Rogenmoser
7d0dc6a5ab
Fix core priviledge includes
2022-12-23 11:19:05 +01:00
Michael Rogenmoser
f0ed3f12c2
Switch PULP properties to idma
2022-12-21 10:39:05 +01:00
Michael Rogenmoser
2ea07afced
Add initial iDMA drivers
2022-12-20 16:50:12 +01:00
Michael Rogenmoser
a7e4be0eff
Add mchan version guards
2022-12-20 16:45:41 +01:00
Michael Rogenmoser
68f9132d12
Add ARCHI_HAS_DMA_DEMUX property to PULP
...
If the cluster core demux and peripheral demux have a direct connection
to the dma, allow the cluster cores to use this connection.
2022-12-20 16:45:41 +01:00
bluew
1ddf10447c
Merge branch 'control-pulp' into master
2022-06-17 16:03:01 +02:00
bluew
07c26b52ac
pulp-runtime/control-pulp: Use priv_1_12
2022-06-10 18:54:00 +02:00
bluew
7a39de8996
archi: Update privileged level constants
2022-06-10 18:53:40 +02:00
aottaviano
1294f4956b
pulp-runtime: Add idma APIs
...
* Add idma archi and hal sources
* Switch with mchan is still manual
2022-06-01 13:42:02 +02:00
aottaviano
9724be258c
pulp-runtime: Add ARCHI_HAS_DMA_DEMUX property to mchan
...
* If the cluster core demux and peripheral demux have a direct connection
to the dma, allow the cluster cores to use this connection.
2022-06-01 13:41:55 +02:00
aottaviano
77fa6799ed
pulp-runtime: Add kairos target
2022-05-17 08:41:20 +02:00
Corrado Bonfanti
18ab940220
Add AVS BUS support and basic test
...
* Add configuration register to set AVS mode
* Add connections to the SPI controller and txrx interface
* Set idle level of sdio[0] signal of SPI master to '1', according to
the AVS protocol
* Add SPI slave device capability to trigger an event for requesting a read from
master by driving low the MISO (SDATA for AVS) when AVS mode is set.
This happens during tx/rx idle phases
* Add basic Write commit/Read test with pulp-runtime. AVS slave is
simulated in tb_avs.sv and tb_avs_fpga.sv.
2022-02-10 20:03:42 +01:00
aottaviano
735f29948c
treewide: Fix I2C slave module and testsuite
...
* Fix wrong signals in RTL hierarchy
* Add I2C slv tb for FPGA wrapper (dump test)
* Add I2C slv tb for ASIC wrapper (irq test)
* Add dump and irq tests
Please enter the commit message for your changes. Lines starting
2021-12-21 09:45:00 +01:00
bluew
0f4e0e588d
pulp-runtime/control-pulp: Fix vector base set and get
...
So that rt_irq_set_fc_vector_base() and co. pick the correct
implemention using csr mtvec.
2021-11-23 11:01:00 +01:00
bluew
026a98d56a
pulp-runtime: Fix uart frequency and bad fll access
...
Control-pulp doesn't have an FLL so we hardcode the frequency domain
values. Furthermore we allow these hardcoded values to change depending
on whether we target the FPGA (zcu102) or rtl sim.
2021-11-04 17:47:57 +01:00
Michael Rogenmoser
b45d16cdd2
Update UDMA configuration in line with pulp-open
2021-09-21 16:51:02 +02:00
bluew
879eb13dbd
hal: Add missing return value
2021-08-10 16:00:56 +02:00
bluew
868a80fdcd
hal/control-pulp: Remove unnecessary camera include
...
We don't have a camera interface in control-pulp.
2021-07-30 16:56:14 +02:00
aottaviano
3829557a94
include/archi: Fixes for I/O in control-pulp
2021-07-25 19:53:51 +02:00
aottaviano
8380fbdc6b
archi: Fix HW Loops encoding for pulp and pulpissimo with cv32e40p
2021-07-20 16:05:02 +02:00
aottaviano
e4fa83f99e
Fix performance counters API
2021-07-20 16:05:02 +02:00
Luca Valente
8891d83838
target: Add pulp with cv32e40p
2021-07-20 16:04:59 +02:00
Luca Valente
9ad3c4f8d6
hal: Add cpu_perf_start for cv32e40p
2021-07-20 16:04:16 +02:00
Luca Valente
9eba7de59a
target: Add pulpissimo with cv32e40p
2021-07-20 16:03:12 +02:00
aottaviano
eafea63a1e
chips/control_pulp: Overhaul header inclusion for control_pulp
2021-07-19 12:14:04 +02:00
bluew
768f79d507
Add support for control-pulp
2021-07-13 17:33:01 +02:00
bluew
4cea7f6207
archi,hal: Add udma_hyper
2021-07-13 17:33:00 +02:00
bluew
b9fd4bdb7e
hal: Add apb_soc_v4
2021-07-13 17:33:00 +02:00
bluew
f38fa52b54
archi,hal: Add soc_eu_v3
2021-07-13 17:33:00 +02:00
Manuel Eggimann
763fa6f72b
Add SOC_FREQUENCY to fpga specific runtime configuration
2021-06-24 22:01:49 +02:00
Michael Rogenmoser
2ba1be662d
Update Macro naming
2021-02-02 11:09:28 +01:00
Michael Rogenmoser
a907bd73bd
fix ri5cy compatibility
2021-01-22 21:11:35 +01:00
Michael Rogenmoser
babf8b1c4e
Add ibex compatibility to pulpissimo
2021-01-22 17:52:42 +01:00
Michael Rogenmoser
a3f57b07d3
Ibex cleanup
2021-01-04 14:09:11 +01:00
Michael Rogenmoser
c3cfcb45e4
Add ibex performance counters
2021-01-04 11:38:39 +01:00
Michael Rogenmoser
5c9907fd7b
Update ibex irq registers
2020-12-07 09:41:29 +01:00
Michael Rogenmoser
034558d689
change spr_read and write from __builtin to hal for irq
2020-12-07 09:40:15 +01:00