mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-27 22:46:05 +00:00
Add initial HMR software config
This commit is contained in:
Michael Rogenmoser
parent
7d0dc6a5ab
commit
776c856d63
8 changed files with 317 additions and 0 deletions
17
configs/hmr_pulp.sh
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17
configs/hmr_pulp.sh
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@ -0,0 +1,17 @@
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#!/bin/bash -e
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export PULPRT_TARGET=pulp
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export PULPRUN_TARGET=pulp
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export USE_CV32E40P=1
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export ARCHI_HMR=1
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if [ -n "${ZSH_VERSION:-}" ]; then
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DIR="$(readlink -f -- "${(%):-%x}")"
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scriptDir="$(dirname $DIR)"
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else
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scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
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fi
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source $scriptDir/common.sh
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@ -99,6 +99,7 @@
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#define ARCHI_ICACHE_CTRL_OFFSET 0x00001400
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#define ARCHI_MCHAN_EXT_OFFSET 0x00001800
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#define ARCHI_IDMA_EXT_OFFSET 0x00001800
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#define ARCHI_HMR_OFFSET 0x00002000
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#define ARCHI_CLUSTER_PERIPHERALS_ADDR ( ARCHI_CLUSTER_ADDR + ARCHI_CLUSTER_PERIPHERALS_OFFSET )
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#define ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_GLOBAL_ADDR(cid) + ARCHI_CLUSTER_PERIPHERALS_OFFSET )
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@ -109,6 +110,15 @@
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#define ARCHI_HWCE_ADDR ( ARCHI_CLUSTER_PERIPHERALS_ADDR + ARCHI_HWCE_OFFSET )
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#define ARCHI_MCHAN_EXT_ADDR ( ARCHI_CLUSTER_PERIPHERALS_ADDR + ARCHI_MCHAN_EXT_OFFSET )
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#define ARCHI_IDMA_EXT_ADDR ( ARCHI_CLUSTER_PERIPHERALS_ADDR + ARCHI_IDMA_EXT_OFFSET )
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#define ARCHI_HMR_ADDR ( ARCHI_CLUSTER_PERIPHERALS_ADDR + ARCHI_HMR_OFFSET )
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#define ARCHI_CLUSTER_CTRL_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_CLUSTER_CTRL_OFFSET )
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#define ARCHI_ICACHE_CTRL_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_ICACHE_CTRL_OFFSET )
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#define ARCHI_EU_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_EU_OFFSET )
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#define ARCHI_HWCE_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_HWCE_OFFSET )
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#define ARCHI_MCHAN_EXT_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_MCHAN_EXT_OFFSET )
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#define ARCHI_IDMA_EXT_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_IDMA_EXT_OFFSET )
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#define ARCHI_HMR_GLOBAL_ADDR(cid) ( ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(cid) + ARCHI_HMR_OFFSET )
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@ -51,4 +51,8 @@
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#include "archi/udma/uart/udma_uart_v1.h"
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#include "archi/udma/udma_v3.h"
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#ifdef ARCHI_HMR
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#include "archi/hmr/hmr_v1.h"
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#endif // ARCHI_HMR
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#endif
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173
include/archi/hmr/hmr_v1.h
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173
include/archi/hmr/hmr_v1.h
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@ -0,0 +1,173 @@
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/*
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* Copyright (C) 2023 ETH Zurich and University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __ARCHI_HMR_HMR_V1_H__
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#define __ARCHI_HMR_HMR_V1_H__
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#define HMR_IN_INTERLEAVED 1
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#define HMR_TOP_OFFSET 0x000
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#define HMR_CORE_OFFSET 0x100
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#define HMR_DMR_OFFSET 0x200
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#define HMR_TMR_OFFSET 0x300
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#define HMR_CORE_INCREMENT 0x008
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#define HMR_TMR_INCREMENT 0x010
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// Generated register defines for HMR_registers
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#ifndef _HMR_REGISTERS_REG_DEFS_
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#define _HMR_REGISTERS_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define HMR_REGISTERS_PARAM_NUM_CORES 12
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#define HMR_REGISTERS_PARAM_NUM_D_M_R_GROUPS 6
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#define HMR_REGISTERS_PARAM_NUM_T_M_R_GROUPS 4
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// Register width
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#define HMR_REGISTERS_PARAM_REG_WIDTH 32
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// Available Configurations from implemented hardware.
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#define HMR_REGISTERS_AVAIL_CONFIG_REG_OFFSET 0x0
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#define HMR_REGISTERS_AVAIL_CONFIG_INDEPENDENT_BIT 0
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#define HMR_REGISTERS_AVAIL_CONFIG_DUAL_BIT 1
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#define HMR_REGISTERS_AVAIL_CONFIG_TRIPLE_BIT 2
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// Enabled cores, based on the configuration. Can be used for barriers.
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#define HMR_REGISTERS_CORES_EN_REG_OFFSET 0x4
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#define HMR_REGISTERS_CORES_EN_CORES_EN_MASK 0xfff
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#define HMR_REGISTERS_CORES_EN_CORES_EN_OFFSET 0
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#define HMR_REGISTERS_CORES_EN_CORES_EN_FIELD \
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((bitfield_field32_t) { .mask = HMR_REGISTERS_CORES_EN_CORES_EN_MASK, .index = HMR_REGISTERS_CORES_EN_CORES_EN_OFFSET })
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// DMR configuration enable, on bit per DMR group.
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#define HMR_REGISTERS_DMR_ENABLE_REG_OFFSET 0x8
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#define HMR_REGISTERS_DMR_ENABLE_DMR_ENABLE_MASK 0x3f
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#define HMR_REGISTERS_DMR_ENABLE_DMR_ENABLE_OFFSET 0
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#define HMR_REGISTERS_DMR_ENABLE_DMR_ENABLE_FIELD \
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((bitfield_field32_t) { .mask = HMR_REGISTERS_DMR_ENABLE_DMR_ENABLE_MASK, .index = HMR_REGISTERS_DMR_ENABLE_DMR_ENABLE_OFFSET })
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// TMR configuration enable, one bit per TMR group.
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#define HMR_REGISTERS_TMR_ENABLE_REG_OFFSET 0xc
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#define HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_MASK 0xf
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#define HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_OFFSET 0
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#define HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_FIELD \
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((bitfield_field32_t) { .mask = HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_MASK, .index = HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_OFFSET })
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// TMR configuration bits.
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#define HMR_REGISTERS_TMR_CONFIG_REG_OFFSET 0x10
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#define HMR_REGISTERS_TMR_CONFIG_DELAY_RESYNCH_BIT 0
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#define HMR_REGISTERS_TMR_CONFIG_SETBACK_BIT 1
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#define HMR_REGISTERS_TMR_CONFIG_RELOAD_SETBACK_BIT 2
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#define HMR_REGISTERS_TMR_CONFIG_FORCE_RESYNCH_BIT 3
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _HMR_REGISTERS_REG_DEFS_
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// End generated register defines for HMR_registers
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// Generated register defines for HMR_core_regs
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#ifndef _HMR_CORE_REGS_REG_DEFS_
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#define _HMR_CORE_REGS_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Register width
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#define HMR_CORE_REGS_PARAM_REG_WIDTH 32
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// Value to determine wich redundancy mode the core with that ID is in.
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#define HMR_CORE_REGS_CURRENT_MODE_REG_OFFSET 0x0
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#define HMR_CORE_REGS_CURRENT_MODE_INDEPENDENT_BIT 0
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#define HMR_CORE_REGS_CURRENT_MODE_DUAL_BIT 1
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#define HMR_CORE_REGS_CURRENT_MODE_TRIPLE_BIT 2
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// Mismatches of the core
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#define HMR_CORE_REGS_MISMATCHES_REG_OFFSET 0x4
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _HMR_CORE_REGS_REG_DEFS_
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// End generated register defines for HMR_core_regs
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// Generated register defines for HMR_dmr_regs
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#ifndef _HMR_DMR_REGS_REG_DEFS_
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#define _HMR_DMR_REGS_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Register width
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#define HMR_DMR_REGS_PARAM_REG_WIDTH 32
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// DMR configuration enable.
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#define HMR_DMR_REGS_DMR_ENABLE_REG_OFFSET 0x0
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#define HMR_DMR_REGS_DMR_ENABLE_TMR_ENABLE_BIT 0
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// DMR configuration bits.
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#define HMR_DMR_REGS_DMR_CONFIG_REG_OFFSET 0x4
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#define HMR_DMR_REGS_DMR_CONFIG_TODO_BIT 0
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// Address for the last checkpoint.
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#define HMR_DMR_REGS_CHECKPOINT_ADDR_REG_OFFSET 0x8
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _HMR_DMR_REGS_REG_DEFS_
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// End generated register defines for HMR_dmr_regs
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// Generated register defines for HMR_tmr_regs
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#ifndef _HMR_TMR_REGS_REG_DEFS_
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#define _HMR_TMR_REGS_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Register width
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#define HMR_TMR_REGS_PARAM_REG_WIDTH 32
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// TMR configuration enable.
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#define HMR_TMR_REGS_TMR_ENABLE_REG_OFFSET 0x0
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#define HMR_TMR_REGS_TMR_ENABLE_TMR_ENABLE_BIT 0
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// TMR configuration bits.
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#define HMR_TMR_REGS_TMR_CONFIG_REG_OFFSET 0x4
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#define HMR_TMR_REGS_TMR_CONFIG_DELAY_RESYNCH_BIT 0
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#define HMR_TMR_REGS_TMR_CONFIG_SETBACK_BIT 1
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#define HMR_TMR_REGS_TMR_CONFIG_RELOAD_SETBACK_BIT 2
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#define HMR_TMR_REGS_TMR_CONFIG_FORCE_RESYNCH_BIT 3
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// Stack Pointer storage register
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#define HMR_TMR_REGS_SP_STORE_REG_OFFSET 0x8
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _HMR_TMR_REGS_REG_DEFS_
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// End generated register defines for HMR_tmr_regs
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#endif // __ARCHI_HMR_HMR_V1_H__
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@ -47,4 +47,8 @@
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#include "hal/udma/spim/udma_spim_v3.h"
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#include "hal/udma/uart/udma_uart_v1.h"
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#ifdef ARCHI_HMR
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#include "hal/hmr/hmr_v1.h"
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#endif // ARCHI_HMR
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#endif
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101
include/hal/hmr/hmr_v1.h
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101
include/hal/hmr/hmr_v1.h
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@ -0,0 +1,101 @@
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/*
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* Copyright (C) 2023 ETH Zurich and University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __HAL_HMR_HMR_V1_H__
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#define __HAL_HMR_HMR_V1_H__
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#include "archi/hmr/hmr_v1.h"
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#include "archi/pulp.h"
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#define NUM_TMR_GROUPS (ARCHI_CLUSTER_NB_PE/3)
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#define NUM_TMR_CORES (ARCHI_CLUSTER_NB_PE-(ARCHI_CLUSTER_NB_PE%3))
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#define NUM_DMR_GROUPS (ARCHI_CLUSTER_NB_PE/2)
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#define NUM_DMR_CORES (ARCHI_CLUSTER_NB_PE-(ARCHI_CLUSTER_NB_PE%2))
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// Interleaved cores
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#define TMR_IS_CORE(core_id) (core_id<NUM_TMR_CORES)
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#if HMR_IN_INTERLEAVED
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#define TMR_GROUP_ID(core_id) (core_id % NUM_TMR_GROUPS)
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#define TMR_CORE_ID(group_id, offset) (group_id + (offset * NUM_TMR_GROUPS))
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#define TMR_BARRIER_ID(group_id) (1+group_id)
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#define TMR_BARRIER_SETUP(group_id) (1<<group_id | 1<<(group_id+NUM_TMR_GROUPS) | 1<<(group_id+2*NUM_TMR_GROUPS))
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#else
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#define TMR_GROUP_ID(core_id) (core_id/3)
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#define TMR_CORE_ID(group_id, offset) ((group_id * 3) + core_offset)
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#define TMR_BARRIER_ID(group_id) (1+group_id+(group_id/2))
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#define TMR_BARRIER_SETUP(group_id) (1<<(3*group_id) | 1<<(3*group_id + 1) | 1<<(3*group_id+2))
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#endif
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#define TMR_IS_MAIN_CORE(core_id) (TMR_IS_CORE(core_id) && (TMR_CORE_ID(TMR_GROUP_ID(core_id), 0) == core_id))
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static inline unsigned int hmr_get_available_config(unsigned int cid) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_AVAIL_CONFIG_REG_OFFSET);
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}
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static inline unsigned int hmr_get_active_cores(unsigned int cid) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_CORES_EN_REG_OFFSET);
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}
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static inline unsigned int hmr_get_core_status(unsigned int cid, unsigned int core_id) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_CORE_OFFSET + (core_id * HMR_CORE_INCREMENT) + HMR_CORE_REGS_CURRENT_MODE_REG_OFFSET);
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}
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static inline unsigned int hmr_get_core_mismatches(unsigned int cid, unsigned int core_id) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_CORE_OFFSET + (core_id * HMR_CORE_INCREMENT) + HMR_CORE_REGS_MISMATCHES_REG_OFFSET);
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}
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static inline unsigned int hmr_reset_core_mismatches(unsigned int cid, unsigned int core_id) {
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return pulp_write32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_CORE_OFFSET + (core_id * HMR_CORE_INCREMENT) + HMR_CORE_REGS_MISMATCHES_REG_OFFSET, 0);
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}
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static inline unsigned int hmr_get_dmr_status_all(unsigned int cid) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_DMR_ENABLE_REG_OFFSET);
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}
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static inline void hmr_set_dmr_status_all(unsigned int cid, unsigned int status) {
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pulp_write32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_DMR_ENABLE_REG_OFFSET, status);
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}
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static inline void hmr_enable_all_dmr(unsigned int cid) {
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hmr_set_dmr_status_all(cid, (1<<NUM_TMR_GROUPS)-1);
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}
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static inline void hmr_disable_all_dmr(unsigned int cid) {
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hmr_set_dmr_status_all(cid, 0);
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}
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static inline unsigned int hmr_get_tmr_status_all(unsigned int cid) {
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return pulp_read32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_TMR_ENABLE_REG_OFFSET);
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}
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static inline void hmr_set_tmr_status_all(unsigned int cid, unsigned int status) {
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pulp_write32(ARCHI_HMR_GLOBAL_ADDR(cid) + HMR_TOP_OFFSET + HMR_REGISTERS_TMR_ENABLE_REG_OFFSET, status);
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}
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static inline void hmr_enable_all_tmr(unsigned int cid) {
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hmr_set_tmr_status_all(cid, (1<<NUM_TMR_GROUPS)-1);
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}
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static inline void hmr_disable_all_tmr(unsigned int cid) {
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hmr_set_tmr_status_all(cid, 0);
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}
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static void hmr_tmr_barrier_setup_all() {
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for (int i = 0; i < NUM_TMR_GROUPS; i++) {
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eu_bar_setup(eu_bar_addr(TMR_BARRIER_ID(i)), TMR_BARRIER_SETUP(i));
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}
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}
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#endif // __HAL_HMR_HMR_V1_H__
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@ -40,7 +40,11 @@ static void cluster_core_init()
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{
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eu_evt_maskSet((1<<PULP_DISPATCH_EVENT) | (1<<PULP_MUTEX_EVENT) | (1<<PULP_HW_BAR_EVENT));
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#ifdef ARCHI_HMR
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eu_bar_setup(eu_bar_addr(0), hmr_get_active_cores(0));
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#else
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eu_bar_setup(eu_bar_addr(0), (1<<ARCHI_CLUSTER_NB_PE) - 1);
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#endif
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}
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void cluster_entry_stub()
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@ -18,6 +18,10 @@ PULP_ARCH_LDFLAGS ?= -march=rv32imcxgap9
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PULP_ARCH_OBJDFLAGS ?= -Mmarch=rv32imcxgap9
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endif
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ifdef ARCHI_HMR
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PULP_CFLAGS += -DARCHI_HMR
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endif
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PULP_CFLAGS += -fdata-sections -ffunction-sections -include chips/pulp/config.h -I$(PULPRT_HOME)/include/chips/pulp
|
||||
PULP_OMP_CFLAGS += -fopenmp -mnativeomp
|
||||
PULP_LDFLAGS += -nostartfiles -nostdlib -Wl,--gc-sections -L$(PULPRT_HOME)/kernel -Tchips/pulp/link.ld -lgcc
|
||||
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|
|
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Reference in a new issue