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Add SOC_FREQUENCY to fpga specific runtime configuration

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This commit is contained in:
Manuel Eggimann 2021-06-24 22:01:49 +02:00
parent 9c397089b0
commit 763fa6f72b
12 changed files with 28 additions and 19 deletions
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2
configs/fpgas/pulpissimo/genesys2.sh
View file

@ -17,6 +17,6 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Genesys2 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_PER_FREQUENCY=10000000 -DARCHI_FPGA_SOC_FREQUENCY=20000000'
export io=uart

2
configs/fpgas/pulpissimo/nexys_video.sh
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@ -17,6 +17,6 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Nexys Video uses 5MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=5000000'
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_PER_FREQUENCY=5000000 -DARCHI_FPGA_SOC_FREQUENCY=10000000'
export io=uart

2
configs/fpgas/pulpissimo/zcu102.sh
View file

@ -17,6 +17,6 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#ZCU102 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_PER_FREQUENCY=10000000 -DARCHI_FPGA_SOC_FREQUENCY=20000000'
export io=uart

2
configs/fpgas/pulpissimo/zcu104.sh
View file

@ -17,6 +17,6 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#ZCU104 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_PER_FREQUENCY=10000000 -DARCHI_FPGA_SOC_FREQUENCY=20000000'
export io=uart

2
configs/fpgas/pulpissimo/zedboard.sh
View file

@ -17,6 +17,6 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Zedboard uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_PER_FREQUENCY=10000000 -DARCHI_FPGA_SOC_FREQUENCY=20000000'
export io=uart

2
include/archi/chips/marsellus/properties.h
View file

@ -22,7 +22,7 @@
* FPGA
*/
#define ARCHI_FPGA_FREQUENCY 5000000
#define ARCHI_FPGA_PER_FREQUENCY 5000000
/*
* MEMORIES

8
include/archi/chips/pulp/properties.h
View file

@ -22,12 +22,12 @@
* FPGA
*/
#ifndef ARCHI_FPGA_FREQUENCY
#define ARCHI_FPGA_FREQUENCY 5000000
#ifndef ARCHI_FPGA_PER_FREQUENCY
#define ARCHI_FPGA_PER_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_FC_FREQUENCY
#define ARCHI_FPGA_FC_FREQUENCY 5000000
#ifndef ARCHI_FPGA_SOC_FREQUENCY
#define ARCHI_FPGA_SOC_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_CL_FREQUENCY

8
include/archi/chips/pulpissimo/properties.h
View file

@ -22,12 +22,12 @@
* FPGA
*/
#ifndef ARCHI_FPGA_FREQUENCY
#define ARCHI_FPGA_FREQUENCY 5000000
#ifndef ARCHI_FPGA_PER_FREQUENCY
#define ARCHI_FPGA_PER_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_FC_FREQUENCY
#define ARCHI_FPGA_FC_FREQUENCY 5000000
#ifndef ARCHI_FPGA_SOC_FREQUENCY
#define ARCHI_FPGA_SOC_FREQUENCY 5000000
#endif

4
kernel/chips/pulp/soc.c
View file

@ -31,9 +31,9 @@ void pos_soc_init()
#else
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_FC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_SOC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_PER_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_CL] = ARCHI_FPGA_CL_FREQUENCY;

4
kernel/chips/pulpissimo/soc.c
View file

@ -28,9 +28,9 @@ void pos_soc_init()
#else
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_FC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_SOC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_PER_FREQUENCY;
#endif
}

2
kernel/init.c
View file

@ -94,4 +94,4 @@ void pos_init_stop()
/* Call global and static destructors */
pos_init_do_dtors();
}
}

9
rules/pulpos/default_rules.mk
View file

@ -137,6 +137,15 @@ ifdef RUNNER_CONFIG
override runner_args += --config-user=$(RUNNER_CONFIG)
endif
ifeq '$(load_mode)' 'fast_debug'
LOAD_MODE := FAST_DEBUG_PRELOAD
else ifeq '$(load_mode)' 'standalone'
LOAD_MODE := STANDALONE
else ifeq '$(load_mode)' 'jtag'
LOAD_MODE := JTAG
else
LOAD_MODE := JTAG
endif
#
# VSIM Flags