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* Fix wrong signals in RTL hierarchy * Add I2C slv tb for FPGA wrapper (dump test) * Add I2C slv tb for ASIC wrapper (irq test) * Add dump and irq tests Please enter the commit message for your changes. Lines starting |
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| archi | ||
| bench | ||
| chips | ||
| data | ||
| hal | ||
| implem | ||
| pulp.h | ||