pulp-runtime/kernel
bluew 026a98d56a pulp-runtime: Fix uart frequency and bad fll access
Control-pulp doesn't have an FLL so we hardcode the frequency domain
values. Furthermore we allow these hardcoded values to change depending
on whether we target the FPGA (zcu102) or rtl sim.
2021-11-04 17:47:57 +01:00
..
chips pulp-runtime: Fix uart frequency and bad fll access 2021-11-04 17:47:57 +01:00
alloc.c Initial commit 2019-12-15 14:12:22 +01:00
alloc_pool.c Cluster stacks are now dynamically allocated to avoid long preloading on netlist sim 2020-04-02 11:09:49 +02:00
bench.c target: Add pulpissimo with cv32e40p 2021-07-20 16:03:12 +02:00
cluster.c Cluster stacks are now dynamically allocated to avoid long preloading on netlist sim 2020-04-02 11:09:49 +02:00
crt0.S 🐛 make startup code compliant to cv32e40p 2020-07-07 14:59:07 +02:00
fll-v1.c Few fixes to have riscv-tests/testIRQ working on pulpissimo 2020-02-06 13:26:14 +01:00
freq-domains.c FIxed wrong size of pos_freq_domains 2020-03-05 15:56:56 +01:00
init.c Add SOC_FREQUENCY to fpga specific runtime configuration 2021-06-24 22:01:49 +02:00
irq.c Few fixes to have riscv-tests/testIRQ working on pulpissimo 2020-02-06 13:26:14 +01:00
irq_asm.S Initial commit 2019-12-15 14:12:22 +01:00
kernel.c Initial commit 2019-12-15 14:12:22 +01:00
soc_event.c Fixed issue with data placement leading to corruption 2020-01-14 23:02:03 +01:00