Commit graph

10 commits

Author SHA1 Message Date
Michael Rogenmoser
f754455e34 Add performance section code 2023-08-02 17:30:16 +02:00
Michael Rogenmoser
5e8e693242 Add optional define guards to avoid unnecessary code 2023-02-20 08:56:34 +01:00
Michael Rogenmoser
1c4270c050 Fix TMR rapid entry assembly 2023-02-17 13:42:34 +01:00
Michael Rogenmoser
f19891bb2b Fix rapid synch 2023-02-16 18:37:11 +01:00
Michael Rogenmoser
882c12c0ce Clean up and speed up code 2023-02-16 16:23:36 +01:00
Michael Rogenmoser
63f83901ef Add SW for DMR critical section 2023-02-16 13:53:16 +01:00
Michael Rogenmoser
90a4c57a42 Update critical section code for functionality 2023-02-10 11:16:38 +01:00
Michael Rogenmoser
2824f98dcc Add code to execute a critical section 2023-02-06 19:24:10 +01:00
Michael Rogenmoser
d7599d8b68 Update sp storage register 2023-02-03 13:53:27 +01:00
Michael Rogenmoser
8403754789 Add initial TMR resynchronization 2023-01-26 18:29:34 +01:00