Add axi_bitq support. In order for this to work we need several
conditions to be true:
- Updated openocd
- FPGA image with axi_bitq built in and hooked up to correct pins
- Updated overlays matching the FPGA image
- An svf file with correct max frequency <= 10MHz
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Using string expression instead of passing in a total hex value.
Now user can passed in for example: init_cals=DEFAULT or
init_cals=BASIC|TX_QEC_INIT
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Slot A and Slot B are different in how the JESD lanes are connected.
We now pass in different deserializer_lane_xbar config values for each slot.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Mark Meserve <mark.meserve@ni.com>
There was a theoretical chance otherwise that we forgot to set the
ref_clock_freq value and it set up the LMK incorrectly.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Now checks the oldest-compat-rev register. Current rev is read out for
logging purposes.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Refactoring to use the C++-based UIO objects. The Liberio and Ethernet
objects now open the UIO before using it, and close it once done.
Reviewed-By: Martin Braun <martin.braun@ettus.com>
- Moved nijesdcore to cores/
- Moved udev, net, dtoverlay, uio to sys_utils/
- Made all imports non-relative (except in __init__.py files)
- Removed some unnecessary imports
- Reordered some imports for Python conventions
- re-structured Magnesium.init_jesd() sequence to accomodate the reconfiguration
- added DRP access protocols to nijesdcore.py
- cleaned up a few comments and log statements in nijesdcore.py for flow
Reviewed-By: Martin Braun <martin.braun@ettus.com>
- ClockSynchronizer object has no more permanent lifetime
- DboardClockControl object lives within `with' statement
- dboard_ctrl_regs are limited to init()
Previously, the daughterboard requested an overlay file based on SFP
preference using magic values. This commit moves the decision making to
the peripheral manager, which uses our singular name (ie 'n3xx' for the
N310).
The clock_synchronizer, jesdcore, and dboard_clk_control objects don't
need to exist for the full lifetime of the Magnesium class. Having them
around complicates management of UIO file descriptors.
- re-wrote portions of the LMK driver for flexible rates and configuration
- tweaked TDC driver for compatibility and ease of debugging
- updated comments and log statements throughout for uniformity
The master_clock_rate argument is passed to init() during
initialization; this change allows to query the correct MCR at
initialization time. It does not allow changing the MCR while a session
is active.
The MCR also affects the LO settings; it is the reference clock for the
lowband LOs.
- Add LO locked APIs to Magnesium
- Add LO locked sensor APIs for RX/TX and highband/lowband LOs
- Poll all those sensors from magnesium_radio_ctrl_impl
Reviewed-By: Steven Bingler <steven.bingler@ni.com>
Reviewed-By: Trung Tran <trung.tran@ettus.com>
This change allow user to set RX LO of ad9371 to external or internal from args
constructor of usrp device.
new args is rx_lo_source value can be either internal or external:
If there's no rx_lo_source specified or invalid value, default rx_lo is used; which is internal LO.
Usage example:
usrp_application --args "rx_lo_source=external"
Currently, AD9371 turned on most of the calibration and hard coding the turning
on process during bringup time.
This change enables users to pass in a mask field for init ARM calibration and
tracking arm calibration at the time creating USRP device reference.
This mask field can be passed through device arguments of:
1/ init_cals : for init ARM calibration masks. This is defined in AD9371 UG-992
table 65. Default to 0x4DFF
2/ tracking_cals : for tracking calibration masks. This is defined in AD9371
UG-992 table 66. Default to 0xC3
Example of pasing in init calibration and tracking calibration mask
usrp_application --args "init_cals=0x4f, tracking_cals=0xC3"
NOTE: UHD currently expect user to input the correct init_cals and
tracking_cals. There's no mechanism to check if init mask and tracking mask are
valid. For example if the init mask field not mask 0x4f, the AD9371 will failed
to setup.
SPI interfaces and -lock, user EEPROM, radio regs, CPLD, dboard clock
control and GPIO expander can be initialized in Magnesium.__init__().
This shaves a little time off of the actual init() call and allows for
earlier failures.
