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uhd/mpm/python/usrp_mpm/dboard_manager
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djepson1 66af893e43 n3xx: enable DRP access to DB MGTS & QPLLs 
- re-structured Magnesium.init_jesd() sequence to accomodate the reconfiguration
 - added DRP access protocols to nijesdcore.py
 - cleaned up a few comments and log statements in nijesdcore.py for flow

Reviewed-By: Martin Braun <martin.braun@ettus.com>
2017-12-22 15:05:58 -08:00
..
__init__.py mpm: Enabled mboard EEPROM readout 2017-12-22 15:03:53 -08:00
base.py mpm: PeriphManager decides and applies overlay 2017-12-22 15:05:57 -08:00
CMakeLists.txt mpm: Added lmk_mg to CMake 2017-12-22 15:04:01 -08:00
eiscat.py mpm: PeriphManager decides and applies overlay 2017-12-22 15:05:57 -08:00
lmk_eiscat.py lmk: change holdover settings to reduce lock time 2017-12-22 15:04:02 -08:00
lmk_mg.py n3xx: add support for 122.88 and 153.6 MHz sample clock rates 2017-12-22 15:05:07 -08:00
magnesium.py n3xx: enable DRP access to DB MGTS & QPLLs 2017-12-22 15:05:58 -08:00
test.py mpm: Made code Python3-compatible 2017-12-22 15:03:58 -08:00
unknown.py mpm: Moved over to new logging infrastructure 2017-12-22 15:03:45 -08:00