Add method to generate GPGGA sensor data in MPM devices. This needs to
be constructed from TPV and SKY sensor data, and matches the GPGGA
sensor functionality in gpsd_iface.cpp.
Previously, the init() procedure of the n3xx class passed either
the user-provided or the default clock_source and time_source values
to initialize the clocking configuration.
When the user did not provide these parameters, the default values
were assigned, overriding whatever configuration the device was
previously initialized with. Therefore, a dboard reinit was forced
when the currently configured state of the N3xx device did not match
the default configuration (i.e. internal sources).
Now, the init() procedure still provides the clock_source and
time_source values; but, if the user does not provide the
parameters, the previously used values are assigned (i.e.
self._clock_source and/or self._time_source).
By the time MPM runs this n3xx init() procedure for the first time,
both self._clock_source and self._time_source have been initialized
with the default internal values anyways in the
_init_ref_clock_and_time() procedure.
This change prevents additional, unnecessary calls to the
set_sync_source() procedure, which ultimately causes a daughterboard
reinitialization when either a new clock or time source is requested.
The update_ref_clock_freq() procedure now updates the self._init_args
value of the Rhodium class daugtherboard objects in MPM to propagate
the latest user-selected arguments for future reference.
gpsd connection is not reliable.
Adding more error handling to re-connect during polling.
Add control flows to get_gps_time in order to give an effect of getting
the value on pps edge.
- This is a combination of 5 commits.
- rh: add lo distribution board gpio expander
- rh: add lo distribution mpm functions
- rh: add code to conditionally initialize lo distribution
- rh: change empty i2c device from exception to assertion
- rh: add lo distribution board control
- Confirmed the Phase DAC to be initialized at mid-scale.
- Confirmed the Phase DAC step resolution for fine clock shifting.
The clock synchronization algorithm relies on the Phase DAC to fine
shift the sampling clocks on each daughterboard.
Only a certain number of DAC codes are required for the actual clock
adjustment, thus a different range of codes may be chosen by
initializing the Phase DAC with a given value. With the selected range,
one may measure the Phase DAC's linearity and step resolution, which
defines how many steps are required when performing the fine shifting
of the clocks.
After initializing the 16-bit Phase DAC at 25%, 50% (mid-scale), and
75%; it was found that the clock distribution PLL locks relatively
faster when using mid-scale (2^15). By testing the Phase DAC's
linearity, it was confirmed that the circuit resolution is 1.11 ps per
code.
- Optimized JESD204B RX/TX links' latency.
- Made JESD latency constant across supported frequencies.
- Checking RX SYSREF capture in the FPGA deframer block.
The JESD204B standard can be linked in such a way to produce a
repeatable, deterministic delay from the framer to deframer. This is
accomplished by setting up a LMFC (local multiframe clock) in both
devices.
The LMFCs are reset whenever a SYSREF edge is captured by the framer
and deframer. Therefore, it is simple to control the LMFC rising edges
in each device by implementing variable delay elements on the SYSREF
pulses to the framer and deframer.
Latency across the JESD204B TX/RX links should remain constant and
deterministic across the supported sampling_clock_rate values. By
testing the roundtrip latency (i.e. FPGA -> TX -> RX -> FPGA) with
different delay values in the FPGA, one may decrease the latency and
provide enough setup and hold margin for the data to be transfered
through each JESD link.
It was found that a different set of SYSREF delay values are required
for sampling_clock_rate = 400 MSPS to match the latency of the other
supported rates.
Add coercing behavior to set_time_source and set_clock_source to
a valid sync source. Also, skip set_sync_source if device already
set to the corresponding one.
Summary:
This change will allow correct args to pass from mboard to dboards,
that in turn can be useful for dboard manager.
Details:
In N310, the dboard manager needs the time source to be updated before
calling update_ref_clock_source(), because it will trigger a reinit of
the dboard, for which the time_source is essential to determine correct
clock synchronizer settings.
The special case is the white rabbit time source needs a different
internal ref_clock_frequency for the clock synchronizer than the passed
in ref_clock_freq.
This provides a new utility for MPM devices (usrp_update_fs.py), which
goes through all the necessary steps to update a filesystem.
Will trigger a mender update, but the tool is not specific to Mender
and can be changed to use other methods in the future.
When reloading the Periph Manager (as when we run the image loader),
we need to run the RPCServer `__init__` function in order to reset the
cache of RPC methods. Otherwise, that cache keeps stale references to
old functions (and prevents garbage collection).
It may be possible to reset the method cache some other way, but the
`_methods` attribute of RPCServer is Cython, and doesn't seem to be
accessible in our Python code.
Adding MPM Git hash and version to the MPM device info. This
information is currently only available through logs when MPM starts
(it is the first log message in usrp_hwd.py). Adding it to the device
info makes it accessible to any application which checks that, such as
uhd_usrp_probe.
- For different ref clock frequencies, the ref_counter should change
and not the n_counter.
- The charge pump should be set to normal mode and tristate as that
would prevent the PLL to lock.
- ref_clock_(int/ext) test was not changing adf400x driver settings
for new ref clock frequency. Therefore, changed the implementation
to use uhd_usrp_probe --sensor to set clock_source and get
'ref_locked' sensor value
Added set_sync_source method to set both the time and clock sources
without forcing a re-init twice. Modified the existing set_time_source
and set_clock_source methods to call into set_sync_source.
EEPROM parsing in MPM was ignoring the dt_compat number (MPM doesn't
need it), so when the dt_compat number was non-zero, the CRC
calculation was incorrect. CRC calculations are now done on the raw
data.
- Fix the syntax to open mboard-regs UIO objects, and change the open()
and close() functions to be private.
- We were calling open() twice in every context manager line- once
manually, and once in __enter__. This commit corrects those usages, and
allows the context manager to fully manage the opening and closing of
UIO objects.
The tests for white rabbit and SFP loopback require a specific FPGA
image. We now check if that image is already available before running
uhd_image_loader.
Adding the following sensors:
- Catalina temperature, RSSI, and LO Lock sensors
- GPS lock, time, TPV, and SKY sensors
Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com>
When a device is re-initialized without any changes (e.g.,
master_clock_rate, ref_clock_freq) then we can skip the initialization
sequence and move on. This shaves a significant amount of time from the
init sequence.
Fast re-init can be overridden by providing the `force_reinit=1` device
arg.
- Refactoring component (FPGA, DTS) updating functions out of
n3xx.py into their own components.py. The ZynqComponent class now
defines the methods to update these two components.
- Adding super().__init__() to the PeriphManagerBase class. This is
needed to get the multiple inheritance used in N3XX now to work, and
(apparently) good Python practice.
- Refactoring GPSd interface to be instead wrapped by a
GPSDIfaceExtension class. This class will faciliate "extending" an
object, allowing that object to call the GPSDIfaceExtension methods as
their own.
- New MPM devices (or whatever else) can now use the GPSDIfaceExtension
class instead of writing their own GPSDIface handling functions.
- N3XX now instantiates a GPSDIfaceExtension object, and extends
itself. This means that an n3xx object can call the `get_gps_time`
method as its own, for example.
- N3XX must get through initialization in order for the GPSd methods
to be registered.
Moving the RFNoC crossbar base port to the class overridables. MPM
devices may need to reserve different numbers of ports for non-blocks;
this can now be done by overriding the crossbar_base_port.
Introduce dt-compat and mcu-compat fields into the eeprom
structure.
For the motherboard eeprom this is straightforward, since
there's still padding bytes that could be (ab)used for this.
On the dboard side more creativity is required and the
original revision field of 2 bytes is reduced to only
one byte revision and one byte dt-compat.
Since this will only affect new units being backwards
compatible with older versions of the bootloader is not
an issue.
Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
This manager first detects all valid Ethernet devices. The checks for
validity happen across multiple calls in a non-atomic fashion, so it's
possible to end up with inconsistent results. To avoid such issues, we
filter results without talking to the network stack as a final pass.
Because the detection of valid Ethernet devices happens across multiple
calls in a non-atomic fashion, we cannot assume that a device passed to
net.get_iface_info() actually has a valid IP address, so we don't make
that assumption.
Since there is no simple mapping from an arbitrary tuple of mboard- and
dboard info dictionaries, we use generate_device_info() to figure out
the product key.
In the N3xx series, the motherboard ID and the device ID can differ. For
example, the N310 could share the same motherboard with a different
device that uses different daughterboards.
This changes the sorting algorithm for the xport<->SFP mapping. When
multiple SFPs are used, this sorting will avoid a criss-cross mapping
(e.g., mapping ports 0 and 1 of 0/Radio_0 to different SFPs).
- Replace mykonos finish_initialization with async version
- Replace myknonos setup_cal with async version
- Remove disable_timeout on rpc_server init()
Usually, the current timeout is fine, but there are cases when a lot of
RPC traffic could drown out the reclaim calls. 5 seconds is an
experimentally derived safe value.
Separating Boost.Python bindings into device-specific files. N3XX code
now lives in n3xx/pyusrp_periphs. Only one src file should be added for
pyusrp_periphs.so by CMake.
Bump maximum supported motherboard revision to 5 (RevF),
to support upcoming motherboard revisions.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Adding address offset to all MBoard and DBoard EEPROM reads. This
matches what we're doing for the user portion of the EEPROM, and
allows us to share access to an EEPROM.
UIO objects now count references on open and close calls. This should
prevent problems with nested function calls that open/close the same
UIO object.
References counts are not atomic -- this is intended for nesting with
statements within the same thread context.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Reviewed-by: Trung Tran <trung.tran@ettus.com>
The log output at level 'INFO' was pretty cluttered. This cleans up the
log messages at the higher levels. In some cases, log message typos or
capitalizations were also fixed.
The FPGA and MPM version as well as the description of the device
("N300-Series Device") and its name (its the hostname) are now properly
reported coming from MPM, properly saved in the prop tree, and
uhd_usrp_probe can nicely display them this way.
-Adding MboardRegsControl.get_fpga_type(), which reads the SFP info
registers and determines the FPGA image type (HG, XG, AA, etc). This is
a minor FPGA compat number bump.
-Adding N310._update_fpga_type(), which updates the component
information using the get_fpga_type() function described above. This
information can then be accessed through get_component_info().
The lines removed here are no longer needed, get rid of them
Suggested-by: Martin Braun <martin.braun@ettus.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
In order to match the front panel 0 and 1 for the SFPs, as well as for
clarity and consistency reasons, udev rules will be put onto future
filesystems in order to rename the eth1 eth2 devices to sfp0 and sfp1.
This change *should* be backwards compatible, nevertheless, be careful
and bump compat number.
This also updates the uhd image loader manifest.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
-set_all function doesn't fit well with the GPIO api. It is rather
a test sepecific function.
-Add gpio_set_all helper to n3xx_bist.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
- Allow to set default args via config file
- Read them from prefs API
- override-db-pids uses the same APIs now ([overrides] section in
config file, prefs API, and same dictionary as --default-args when
used on the command line
Add axi_bitq support. In order for this to work we need several
conditions to be true:
- Updated openocd
- FPGA image with axi_bitq built in and hooked up to correct pins
- Updated overlays matching the FPGA image
- An svf file with correct max frequency <= 10MHz
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Before, it was possible to trick the RPC server in believing a
connection was remote when the incoming connection was from a local IP
address that was not 127.0.0.1.
Adding helper function to parse strings to a boolean value. We can
then use that function to parse MPM's default_args, and set enable_gps
and enable_fp_gpio. This replaces the usages of the Python builtin
bool(), which returns True for any non-empty string.
Using string expression instead of passing in a total hex value.
Now user can passed in for example: init_cals=DEFAULT or
init_cals=BASIC|TX_QEC_INIT
Reviewed-by: Martin Braun <martin.braun@ettus.com>
- When clock source is set, but time source is not, still set time
source to guarantee correct ref clock freq
- Enable unconditional setting of time source
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
- Allow configurable timeout values from the command line
- Add flag to disable timeouts for long calls; this fixes the case
where reclaimers re-initialize a disabled timer
- Add methods for timeout event for better tracking
When trying to run init(), mpmd will first query the initialization
status of the MPM device. If it is found to be in a bad state, it will
not go forward with initialization, but instead print the error message.
- Sort methods by functional groups
- Reorder init from less likely to fail to more likely (this enables
the LINK LED on claim for when FPGA fails to initialize, e.g. on
compat errors)
- Updated systemd service file
- Added health status flag in shared data object
- Added thread in RPC process to update watchdog
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Slot A and Slot B are different in how the JESD lanes are connected.
We now pass in different deserializer_lane_xbar config values for each slot.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Mark Meserve <mark.meserve@ni.com>
GPIOBank is the new class, n310.FrontpanelGPIO and BackpanelGPIO now
derive from that.
Other minor changes:
- Renamed classes to FrontpanelGPIO and BackpanelGPIO in accordance
with coding guidelines
- Moved MboardRegsControl before n310 class for consistent code layout
Add code to drive back panel LEDs for GPS, Link (claim) and REF
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-By: Martin Braun <martin.braun@ettus.com>
These are hooks that the RPC server calls into when claiming a device,
and allow the device implementation to trigger user-definable actions
on claiming/unclaiming.
There was a theoretical chance otherwise that we forgot to set the
ref_clock_freq value and it set up the LMK incorrectly.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Now checks the oldest-compat-rev register. Current rev is read out for
logging purposes.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
MPM will now no longer keep a SID framer variable.
Reviewed-by: Trung Tran <trung.tran@ettus.com>
Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
The echo server was using the wrong socket options, allowing responses
to be fragmented. Since we use the echo server for MTU discovery, that
would have beaten the purpose.
Also includes minor formatting fixes.
This splits up the transport code in mpmd_impl across multiple classes
to properly leverage the request_xport/commit_xport API in MPM.
Different types of transport (UDP, liberio) use their own distinct
classes, which are generated dynamically on request.
This is a true refactoring despite the large amount of changes; there
are no functional differences.
Reviewed-By: Brent Stapleton <brent.stapleton@ettus.com>
Reviewed-By: Trung Tran <trung.tran@ettus.com>
Reviewed-By: Ashish Chaudhari <ashish.chaudhari@ettus.com>
On FPGA loads, when the periph_manager is respawned, this will now
clear the previously registered methods.
Reviewed-By: Brent Stapleton <brent.stapleton@ettus.com>
This will enumerate CHDR interfaces as late as possible, so that the
user changing the IP address will not affect operations. Note that IP
is considered static during a UHD session.
Refactoring to use the C++-based UIO objects. The Liberio and Ethernet
objects now open the UIO before using it, and close it once done.
Reviewed-By: Martin Braun <martin.braun@ettus.com>
- Moved nijesdcore to cores/
- Moved udev, net, dtoverlay, uio to sys_utils/
- Made all imports non-relative (except in __init__.py files)
- Removed some unnecessary imports
- Reordered some imports for Python conventions
- re-structured Magnesium.init_jesd() sequence to accomodate the reconfiguration
- added DRP access protocols to nijesdcore.py
- cleaned up a few comments and log statements in nijesdcore.py for flow
Reviewed-By: Martin Braun <martin.braun@ettus.com>
- complete time_source options to match updates to fpga registers
- add methods for each of the bitfields in the clock control register
- add init sequences for the meas_clk MMCM and PPS output
Reviewed-By: Martin Braun <martin.braun@ettus.com>
Current code have couple places that open pyroute2 without closing it.
That seems to cause the file descriptor leakage.
This change effectively fix the issue #1964
Zlib's crc32 outputs signed values in python2 and unsigned values in
python3. As per this page (https://docs.python.org/2/library/zlib.html)
0xffffffff can be AND'd to the result to get the same value between
Python versions
- ClockSynchronizer object has no more permanent lifetime
- DboardClockControl object lives within `with' statement
- dboard_ctrl_regs are limited to init()
Upon updating certain components (the FPGA, for example), the
Peripheral Manager is restarted, and the overlay is reapplied. In order
to facilitate this, the RPC server intercepts and handles the
update_component function.
Tested on the RJ45 ethernet connection. It probably won't work as well
if the SFP connection goes down when the overlay is removed.
Previously, the daughterboard requested an overlay file based on SFP
preference using magic values. This commit moves the decision making to
the peripheral manager, which uses our singular name (ie 'n3xx' for the
N310).
Paths to the component files is now stored in the updateable_components
dictionary. This makes them accessible in the base class, and generally cleans
up the member variables.
- The MPM function update_component now accepts multiple components to
be updated in one RPC call.
- Updated the property tree and image loader to match this change.
- Also added DTS loading to the image loader.
The clock_synchronizer, jesdcore, and dboard_clk_control objects don't
need to exist for the full lifetime of the Magnesium class. Having them
around complicates management of UIO file descriptors.
- re-wrote portions of the LMK driver for flexible rates and configuration
- tweaked TDC driver for compatibility and ease of debugging
- updated comments and log statements throughout for uniformity
The master_clock_rate argument is passed to init() during
initialization; this change allows to query the correct MCR at
initialization time. It does not allow changing the MCR while a session
is active.
The MCR also affects the LO settings; it is the reference clock for the
lowband LOs.
- Add LO locked APIs to Magnesium
- Add LO locked sensor APIs for RX/TX and highband/lowband LOs
- Poll all those sensors from magnesium_radio_ctrl_impl
Reviewed-By: Steven Bingler <steven.bingler@ni.com>
Reviewed-By: Trung Tran <trung.tran@ettus.com>
This change allow user to set RX LO of ad9371 to external or internal from args
constructor of usrp device.
new args is rx_lo_source value can be either internal or external:
If there's no rx_lo_source specified or invalid value, default rx_lo is used; which is internal LO.
Usage example:
usrp_application --args "rx_lo_source=external"
Currently, AD9371 turned on most of the calibration and hard coding the turning
on process during bringup time.
This change enables users to pass in a mask field for init ARM calibration and
tracking arm calibration at the time creating USRP device reference.
This mask field can be passed through device arguments of:
1/ init_cals : for init ARM calibration masks. This is defined in AD9371 UG-992
table 65. Default to 0x4DFF
2/ tracking_cals : for tracking calibration masks. This is defined in AD9371
UG-992 table 66. Default to 0xC3
Example of pasing in init calibration and tracking calibration mask
usrp_application --args "init_cals=0x4f, tracking_cals=0xC3"
NOTE: UHD currently expect user to input the correct init_cals and
tracking_cals. There's no mechanism to check if init mask and tracking mask are
valid. For example if the init mask field not mask 0x4f, the AD9371 will failed
to setup.
SPI interfaces and -lock, user EEPROM, radio regs, CPLD, dboard clock
control and GPIO expander can be initialized in Magnesium.__init__().
This shaves a little time off of the actual init() call and allows for
earlier failures.
