mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-14 20:48:09 +00:00
Add UART drivers in case this is a host peripheral to differentiate them from those that make use of udma
This mod is tailored for Astral and its host, Cheshire, whose basic funcitons are reused. This enables printing from the cluster.
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parent
da4e51e71d
commit
dfd91b93a1
9 changed files with 113 additions and 3 deletions
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@ -4,6 +4,7 @@ export PULPRT_TARGET=astral-cluster
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export PULPRUN_TARGET=astral-cluster
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export CONFIG_NO_FC=1
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export ARCHI_HMR=1
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export ARCHI_HOST_UART=1
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if [ -n "${ZSH_VERSION:-}" ]; then
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DIR="$(readlink -f -- "${(%):-%x}")"
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47
drivers/host_uart.c
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47
drivers/host_uart.c
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@ -0,0 +1,47 @@
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// Copyright 2022 ETH Zurich and University of Bologna.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Nils Wistoff <nwistoff@iis.ee.ethz.ch>
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// Paul Scheffler <paulsc@iis.ee.ethz.ch>
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#include "host_uart.h"
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static inline volatile uint8_t *reg8(void *base, int offs) {
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return (volatile uint8_t *)(base + offs);
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}
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static inline void fence() {
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asm volatile("fence" ::: "memory");
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}
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int uart_read_ready(void *uart_base) {
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return *reg8(uart_base, UART_LINE_STATUS_REG_OFFSET) & (1 << UART_LINE_STATUS_DATA_READY_BIT);
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}
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static inline int __uart_write_ready(void *uart_base) {
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return *reg8(uart_base, UART_LINE_STATUS_REG_OFFSET) & (1 << UART_LINE_STATUS_THR_EMPTY_BIT);
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}
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static inline int __uart_write_idle(void *uart_base) {
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return __uart_write_ready(uart_base) &&
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*reg8(uart_base, UART_LINE_STATUS_REG_OFFSET) & (1 << UART_LINE_STATUS_TMIT_EMPTY_BIT);
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}
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void uart_write(void *uart_base, uint8_t byte) {
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while (!__uart_write_ready(uart_base))
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;
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*reg8(uart_base, UART_THR_REG_OFFSET) = byte;
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}
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void uart_write_flush(void *uart_base) {
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fence();
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while (!__uart_write_idle(uart_base))
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;
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}
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uint8_t uart_read(void *uart_base) {
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while (!uart_read_ready(uart_base))
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;
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return *reg8(uart_base, UART_RBR_REG_OFFSET);
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}
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40
drivers/include/host_uart.h
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40
drivers/include/host_uart.h
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@ -0,0 +1,40 @@
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// Copyright 2022 ETH Zurich and University of Bologna.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Nils Wistoff <nwistoff@iis.ee.ethz.ch>
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// Paul Scheffler <paulsc@iis.ee.ethz.ch>
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#pragma once
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#include <stdint.h>
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// Register offsets
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#define UART_RBR_REG_OFFSET 0
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#define UART_THR_REG_OFFSET 0
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#define UART_INTR_ENABLE_REG_OFFSET 4
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#define UART_INTR_IDENT_REG_OFFSET 8
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#define UART_FIFO_CONTROL_REG_OFFSET 8
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#define UART_LINE_CONTROL_REG_OFFSET 12
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#define UART_MODEM_CONTROL_REG_OFFSET 16
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#define UART_LINE_STATUS_REG_OFFSET 20
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#define UART_MODEM_STATUS_REG_OFFSET 24
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#define UART_DLAB_LSB_REG_OFFSET 0
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#define UART_DLAB_MSB_REG_OFFSET 4
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// Register fields
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#define UART_LINE_STATUS_DATA_READY_BIT 0
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#define UART_LINE_STATUS_THR_EMPTY_BIT 5
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#define UART_LINE_STATUS_TMIT_EMPTY_BIT 6
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int uart_read_ready(void *uart_base);
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void uart_write(void *uart_base, uint8_t byte);
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void uart_write_str(void *uart_base, void *src, uint64_t len);
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void uart_write_flush(void *uart_base);
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uint8_t uart_read(void *uart_base);
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void uart_read_str(void *uart_base, void *dst, uint64_t len);
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@ -60,6 +60,7 @@
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#define ARCHI_FC_ITC_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_FC_ITC_OFFSET )
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#define ARCHI_FC_TIMER_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_FC_TIMER_OFFSET )
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#define ARCHI_STDOUT_ADDR 0x03002000
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#define ARCHI_HOST_UART_ADDR 0x03002000
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#define ARCHI_FLL_AREA_SIZE 0x00000010
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@ -93,12 +93,12 @@ void _start();
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#ifdef ARCHI_CLUSTER_NB_PE
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static inline int get_core_num() { return ARCHI_CLUSTER_NB_PE; }
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#endif
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#if defined(CONFIG_IO_UART) && CONFIG_IO_UART == 1
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int uart_open(int uart_id, int baudrate);
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void uart_close(int uart_id);
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int uart_write(int uart_id, void *buffer, uint32_t size);
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int uart_read(int uart_id, void *buffer, uint32_t size);
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#endif
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void synch_barrier();
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@ -239,12 +239,21 @@ static void pos_libc_putc_uart(char c)
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}
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#endif
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#if defined(CONFIG_IO_UART) && CONFIG_IO_UART == 2
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static void pos_libc_putc_host_uart(char c)
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{
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uart_write(ARCHI_HOST_UART_ADDR, c);
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uart_write_flush(ARCHI_HOST_UART_ADDR);
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}
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#endif
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static void pos_putc(char c)
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{
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#if defined(CONFIG_IO_UART) && CONFIG_IO_UART == 1
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pos_libc_putc_uart(c);
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#elif defined(CONFIG_IO_UART) && CONFIG_IO_UART == 2
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pos_libc_putc_host_uart(c);
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#else
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pos_libc_putc_stdout(c);
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#endif
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@ -36,6 +36,10 @@ ifdef io
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ifeq '$(io)' 'uart'
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CONFIG_IO_UART=1
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endif
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ifeq '$(io)' 'host_uart'
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CONFIG_IO_UART=2
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PULP_APP_CFLAGS += -I$(PULPRT_HOME)/drivers/include
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endif
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endif
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VPATH = $(PULPRT_HOME)
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@ -6,7 +6,15 @@ ifeq '$(CONFIG_LIBC_MINIMAL)' '1'
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PULP_SRCS += lib/libc/minimal/io.c lib/libc/minimal/fprintf.c lib/libc/minimal/prf.c lib/libc/minimal/sprintf.c
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endif
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PULP_SRCS += kernel/init.c kernel/kernel.c kernel/alloc.c kernel/alloc_pool.c kernel/irq.c kernel/soc_event.c kernel/bench.c drivers/uart.c
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ifeq '$(CONFIG_IO_UART)' '1'
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PULP_SRCS += drivers/udma_uart.c
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endif
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ifeq '$(CONFIG_IO_UART)' '2'
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PULP_SRCS += drivers/host_uart.c
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endif
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PULP_SRCS += kernel/init.c kernel/kernel.c kernel/alloc.c kernel/alloc_pool.c kernel/irq.c kernel/soc_event.c kernel/bench.c
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PULP_ASM_SRCS += kernel/irq_asm.S
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