7 commits

Author	SHA1	Message	Date
bunnie	74e2f3f2d2	add a trace debug print in engine emulation for correlation ... against cycle-accurate verilog simulator.	2021-09-07 05:08:56 +08:00
Sean Cross	d248ab3cc7	emulation: engine: always update registers on write ... These registers get reset when the hardware is reset, however the engine may still be running. Ensure it's not running when the device is reset. Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-15 18:23:36 +08:00
Sean Cross	3f1593e56e	emulation: engines: cache registers in RAM ... Don't consult RAM every time we want to read a register. This improves performance at the cost of potentially having stale registers. Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-15 18:10:38 +08:00
Sean Cross	9b43b7e475	emulation: engine: remove unused properties ... These properties and variables were unused, and should be removed. Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-15 15:56:18 +08:00
Sean Cross	4790686dd9	engine: pass all checks with engine check ... This fixes bugs in SUB, XOR, MUL, NOT, and gets register windows working. Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-15 11:28:53 +08:00
Sean Cross	acc981638e	engine: only 4 tests are failing ... Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-15 09:24:19 +08:00
Sean Cross	fd5e07b983	emulation: add broken engine implementation ... Signed-off-by: Sean Cross <sean@xobs.io>	2021-07-13 22:25:46 +08:00