mirror of
https://github.com/saymrwulf/xous-core.git
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d248ab3cc7
These registers get reset when the hardware is reset, however the engine may still be running. Ensure it's not running when the device is reset. Signed-off-by: Sean Cross <sean@xobs.io>
652 lines
23 KiB
C#
652 lines
23 KiB
C#
//
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// Copyright (c) 2010-2018 Antmicro
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// Copyright (c) 2011-2015 Realtime Embedded
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//
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// This file is licensed under the MIT License.
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// Full license text is available in 'licenses/MIT.txt'.
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//
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using System;
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using System.Threading;
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using System.Text;
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using System.Linq;
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using System.Globalization;
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using System.Numerics;
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using Antmicro.Renode.Core;
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using Antmicro.Renode.Core.Structure.Registers;
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using Antmicro.Renode.Logging;
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using Antmicro.Renode.Peripherals.Bus;
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namespace Antmicro.Renode.Peripherals.Miscellaneous
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{
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public class EngineRam : IDoubleWordPeripheral, IKnownSize
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{
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public EngineRam(Machine machine, Engine engine, long size)
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{
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this.machine = machine;
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this.engine = engine;
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this.size = size;
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this.data = new UInt32[size / 4];
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this.FIELD_MAX = BigInteger.Pow(2, 255) - 19;
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this.UINT_MAX = BigInteger.Pow(2, 256) - 1;
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this.ZERO = new BigInteger(0);
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this.ONE = new BigInteger(1);
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this.AM24 = new BigInteger(121665); // (A-2)/4
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this.AP24 = new BigInteger(121666); // (A+2)/4
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this.FIVE = new BigInteger(5);
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this.TEN = new BigInteger(10);
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this.TWENTY = new BigInteger(20);
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this.FIFTY = new BigInteger(50);
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this.ONE_HUNDRED = new BigInteger(100);
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this.registers = new BigInteger[32];
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for (var i = 0; i < this.registers.Length; i++)
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{
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this.registers[i] = this.ZERO;
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}
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}
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public void SyncRegistersFromRam(ulong rf)
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{
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for (var i = 0; i < this.registers.Length; i++)
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{
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this.registers[i] = ReadRegisterFromRam(rf, (ulong)i);
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}
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}
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public void SyncRegistersToRam(ulong rf)
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{
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for (var i = 0; i < this.registers.Length; i++)
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{
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WriteRegisterToRam(rf, (ulong)i, this.registers[i]);
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}
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}
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public BigInteger UINT_MAX;
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public BigInteger ZERO;
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public BigInteger ONE;
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public BigInteger AM24;
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public BigInteger FIELD_MAX;
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public BigInteger AP24;
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public BigInteger FIVE;
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public BigInteger TEN;
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public BigInteger TWENTY;
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public BigInteger FIFTY;
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public BigInteger ONE_HUNDRED;
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private Machine machine;
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private Engine engine;
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private long size;
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public UInt32[] data;
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public BigInteger[] registers;
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public long Size { get { return size; } }
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public void WriteDoubleWord(long address, uint value)
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{
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this.data[address / 4] = value;
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}
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public uint ReadDoubleWord(long offset)
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{
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return this.data[offset / 4];
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}
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public BigInteger ReadRegister(ulong register, bool constant)
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{
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// this.Log(LogLevel.Error, "Reading register {0} (const? {1}) from rf {2}", register, constant, rf);
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if (constant)
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{
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switch (register)
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{
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case 0: return this.ZERO;
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case 1: return this.ONE;
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case 2: return this.AM24;
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case 3: return this.FIELD_MAX;
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case 4: return this.AP24;
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case 5: return this.FIVE;
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case 6: return this.TEN;
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case 7: return this.TWENTY;
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case 8: return this.FIFTY;
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case 9: return this.ONE_HUNDRED;
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default: return this.ZERO;
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}
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}
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return this.registers[register];
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}
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public BigInteger ReadRegisterFromRam(ulong rf, ulong register)
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{
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var src_bytes = new byte[33]; // Keep leading byte 0 to force unsigned
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// if ((rf >= 16) || (register >= 32))
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// {
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// throw new Exception(String.Format("Register #{0} or RegisterFile {1} is out of range", register, rf));
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// }
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for (ulong i = 0; i < 32; i += 4)
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{
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var offset = 0x10000 + (rf * 1024) + (register * 32) + i;
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var bytes = BitConverter.GetBytes(this.data[offset / 4]);
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if (bytes.Length != 4)
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{
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throw new Exception("Bytes was not equal to 4");
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}
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for (ulong j = 0; j < (ulong)bytes.Length; j++)
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{
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if ((i + j) >= 32)
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{
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throw new Exception("i+j>=32");
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}
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src_bytes[i + j] = bytes[j];
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}
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}
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// this.Log(LogLevel.Error, "Returning read value from {0}-byte array", src_bytes.Length);
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return new BigInteger(src_bytes);
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}
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public void WriteRegisterToRam(ulong rf, ulong register, BigInteger value)
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{
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// if ((rf >= 16) || (register >= 32))
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// {
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// throw new Exception(String.Format("Register #{0} or RegisterFile {1} is out of range", register, rf));
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// }
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var bytes = value.ToByteArray();
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if (bytes.Length < 32)
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{
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bytes = bytes.Concat(new byte[32 - bytes.Length]);
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}
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var offset = 0x10000 + (rf * 1024) + (register * 32);
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for (uint i = 0; i < 32; i += 4)
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{
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this.data[(offset + i) / 4] = (((uint)bytes[i + 0]) << 0)
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| (((uint)bytes[i + 1]) << 8)
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| (((uint)bytes[i + 2]) << 16)
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| ((uint)(bytes[i + 3]) << 24);
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}
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}
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public void WriteRegister(ulong register, BigInteger value)
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{
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this.registers[register] = value & this.UINT_MAX;
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}
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public String FormatValue(BigInteger value)
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{
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var trimmed_value = value & this.UINT_MAX;
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var bytes = trimmed_value.ToByteArray();
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if (bytes.Length < 32)
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{
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bytes = bytes.Concat(new byte[32 - bytes.Length]);
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}
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StringBuilder hex = new StringBuilder(bytes.Length * 2);
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foreach (byte b in bytes.Reverse())
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hex.AppendFormat("{0:x2}", b);
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return hex.ToString();
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}
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public void Reset()
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{
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for (var i = 0; i < this.data.Length; i++)
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{
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this.data[i] = 0;
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}
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}
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}
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public class Opcode : IFormattable
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{
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public Opcode(UInt32 op)
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{
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this.Op = (op >> 0) & 0x3f;
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this.Ra = (op >> 6) & 0x1f;
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this.Ca = ((op >> 11) & 1) == 1;
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this.Rb = (op >> 12) & 0x1f;
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this.Cb = ((op >> 17) & 1) == 1;
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this.Wd = (op >> 18) & 0x1f;
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this.Immediate = (int)(op >> 23);
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if ((this.Immediate & (1 << 8)) != 0)
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{
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this.Immediate = this.Immediate - (1 << 9);
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}
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}
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public String ConstantName(uint idx)
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{
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switch (idx)
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{
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case 0: return "zero";
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case 1: return "one";
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case 2: return "am24";
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case 3: return "field";
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case 4: return "ap24";
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case 5: return "five";
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case 6: return "ten";
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case 7: return "twenty";
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case 8: return "fifty";
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case 9: return "one_hundred";
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default: return "undef";
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}
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}
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public String RaName()
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{
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if (this.Ca)
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{
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return "#" + this.ConstantName(this.Ra).ToUpper();
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}
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return "r" + this.Ra;
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}
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public String RbName()
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{
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if (this.Cb)
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{
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return "#" + this.ConstantName(this.Rb).ToUpper();
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}
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return "r" + this.Rb;
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}
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public String WdName()
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{
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return "r" + this.Wd;
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}
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public string Mnemonic()
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{
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switch (this.Op)
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{
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case 0: return "PSA";
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case 1: return "PSB";
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case 2: return "MSK";
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case 3: return "XOR";
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case 4: return "NOT";
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case 5: return "ADD";
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case 6: return "SUB";
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case 7: return "MUL";
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case 8: return "TRD";
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case 9: return "BRZ";
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case 10: return "FIN";
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case 11: return "SHL";
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case 12: return "XBT";
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default: return "UDF";
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}
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}
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public string ToString(string format, IFormatProvider provider)
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{
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if ((this.Op == 0) || (this.Op == 4) || (this.Op == 8) || (this.Op == 11) || (this.Op == 12))
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{
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return String.Format("{0} {1}, {2}", this.Mnemonic(), this.WdName(), this.RaName());
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}
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else if (this.Op == 1)
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{
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return String.Format("{0} {1}, {2}", this.Mnemonic(), this.WdName(), this.RbName());
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}
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else if (this.Op == 9)
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{
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return String.Format("{0} pc + {1}, {2}", this.Mnemonic(), this.Immediate, this.RaName());
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}
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else if (this.Op == 10)
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{
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return this.Mnemonic();
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}
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else if ((this.Op == 2) || (this.Op == 3) || (this.Op == 5) || (this.Op == 6) || (this.Op == 7)) // OK
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{
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return String.Format("{0} {1}, {2}, {3}", this.Mnemonic(), this.WdName(), this.RaName(), this.RbName());
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}
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else
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{
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return "undef";
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}
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}
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public UInt32 Op;
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public UInt32 Ra;
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public bool Ca;
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public UInt32 Rb;
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public bool Cb;
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public UInt32 Wd;
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public Int32 Immediate;
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}
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public class Engine : IDoubleWordPeripheral, IProvidesRegisterCollection<DoubleWordRegisterCollection>, IKnownSize
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{
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public Engine(Machine machine, uint memAddr, uint memSize)
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{
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this.machine = machine;
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this.engineRam = new EngineRam(machine, this, memSize);
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machine.SystemBus.Register(this.engineRam, new BusRangeRegistration(memAddr, memSize));
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this.RegistersCollection = new DoubleWordRegisterCollection(this);
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this.IRQ = new GPIO();
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Reset();
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DefineRegisters();
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}
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~Engine()
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{
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if ((this.engineExecution != null) && (this.engineExecution.IsAlive))
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{
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this.engineExecution.Abort();
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}
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}
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private void EngineThread()
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{
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// this.Log(LogLevel.Error, "ENGINE: Beginning execution. Current MPC: 0x{0:X}", this.mpstart);
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try
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{
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// Interlocked.Exchange(ref this.mpc, this.mpstart);
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this.mpc = this.mpstart;
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var window = this.window;
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this.engineRam.SyncRegistersFromRam(window);
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while (true)
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{
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if (this.mpc >= this.mplen)
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{
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throw new Exception(String.Format("mpc exceeded program length of {0}", this.mplen));
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}
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var op = new Opcode(this.engineRam.data[this.mpc]);
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// this.Log(LogLevel.Error, "RAM[0x{0:X}] {1}", this.mpc, op);
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switch (op.Op)
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{
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case 0: // PSA
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// this.engineRam.WriteRegister(op.Wd, this.engineRam.ReadRegister(op.Ra, op.Ca));
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ReadRegister(op.Ra, op.Ca));
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break;
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case 1: // PSB
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ReadRegister(op.Rb, op.Cb));
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break;
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case 2: // MSK
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if ((this.engineRam.ReadRegister(op.Ra, op.Ca) & 1) != 0)
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ReadRegister(op.Rb, op.Cb));
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}
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else
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ZERO);
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}
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break;
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case 3: // XOR
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this.engineRam.WriteRegister(op.Wd,
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(BigInteger.Pow(2, 256) | this.engineRam.ReadRegister(op.Ra, op.Ca)) ^ this.engineRam.ReadRegister(op.Rb, op.Cb));
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break;
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case 4: // NOT
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this.engineRam.WriteRegister(op.Wd,
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~(this.engineRam.ReadRegister(op.Ra, op.Ca) | BigInteger.Pow(2, 256)));
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break;
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case 5: // ADD
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this.engineRam.WriteRegister(op.Wd,
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this.engineRam.ReadRegister(op.Ra, op.Ca) + this.engineRam.ReadRegister(op.Rb, op.Cb));
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break;
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case 6: // SUB
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{
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var left = this.engineRam.ReadRegister(op.Ra, op.Ca);
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var right = this.engineRam.ReadRegister(op.Rb, op.Cb);
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var result = left - right;
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// Wrap integer
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if (result < 0)
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{
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result = BigInteger.Pow(2, 256) - result;
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}
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this.engineRam.WriteRegister(op.Wd, result);
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}
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break;
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case 7: // MUL
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this.engineRam.WriteRegister(op.Wd,
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(this.engineRam.ReadRegister(op.Ra, op.Ca)
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* this.engineRam.ReadRegister(op.Rb, op.Cb))
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% this.engineRam.FIELD_MAX
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);
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break;
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case 8: // TRD
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if (this.engineRam.ReadRegister(op.Ra, op.Ca) >= this.engineRam.FIELD_MAX)
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.FIELD_MAX);
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}
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else
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ZERO);
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}
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break;
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case 9: // BRZ
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if (this.engineRam.ReadRegister(op.Ra, op.Ca) == 0)
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{
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this.mpc = (ushort)((int)this.mpc + op.Immediate);
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}
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break;
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case 10: // FIN
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break;
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case 11: // SHL
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ReadRegister(op.Ra, op.Ca) << 1);
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break;
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case 12: // XBT
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if ((this.engineRam.ReadRegister(op.Ra, op.Ca) & (this.engineRam.ONE << 254)) != 0)
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ONE);
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}
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else
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{
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this.engineRam.WriteRegister(op.Wd, this.engineRam.ZERO);
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}
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break;
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default:
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this.illegalOpcodeStatus = true;
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throw new Exception("Unhandled opcode");
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}
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// Interlocked.Increment(ref this.mpc);
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this.mpc += 1;
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if (op.Op == 10)
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{
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break;
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}
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// this.Log(LogLevel.Error, " (Result) {0}", this.engineRam.FormatValue(this.engineRam.ReadRegister(op.Wd, false)));
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}
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}
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catch (Exception e)
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{
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this.Log(LogLevel.Error, "ENGINE execution exception {0}", e);
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}
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this.finishedStatus = true;
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// this.engineExecution = null;
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this.engineRam.SyncRegistersToRam(window);
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this.UpdateInterrupts();
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this.finishedStatus = false;
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this.illegalOpcodeStatus = false;
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// this.Log(LogLevel.Error, "ENGINE finished execution");
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}
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private void DefineRegisters()
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{
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Registers.WINDOW.Define(this)
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.WithValueField(0, 4, name: "WINDOW", valueProviderCallback: (_) => this.window, writeCallback: (_, value) => this.window = (byte)(value & 0xf))
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;
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Registers.MPSTART.Define(this)
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.WithValueField(0, 11, name: "MPSTART", valueProviderCallback: (_) => this.mpstart, writeCallback: (_, value) => this.mpstart = (UInt16)(value & 0x7ff))
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;
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Registers.MPLEN.Define(this)
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.WithValueField(0, 11, name: "MPLEN", valueProviderCallback: _ => this.mplen, writeCallback: (_, value) => this.mplen = (UInt16)(value & 0x7ff))
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;
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Registers.CONTROL.Define(this)
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.WithFlag(0, FieldMode.Write, name: "GO", writeCallback: (_, value) =>
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{
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if (value)
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{
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if ((this.engineExecution != null) && (this.engineExecution.IsAlive))
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{
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this.Log(LogLevel.Error, "ENGINE already executing -- not re-running");
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}
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else
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{
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this.engineExecution = new Thread(this.EngineThread) { Name = "Engine Execution", IsBackground = true };
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this.engineExecution.Start();
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}
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}
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})
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;
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Registers.MPRESUME.Define(this)
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.WithValueField(0, 11, name: "MPRESUME", valueProviderCallback: _ => this.mpresume, writeCallback: (_, value) => { this.mpresume = (UInt16)(value & 0x7ff); })
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;
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Registers.POWER.Define(this)
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.WithFlag(0, out powerIsOn, FieldMode.Read | FieldMode.Write, name: "ON")
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.WithFlag(1, out pauseRequest, FieldMode.Read | FieldMode.Write, name: "PAUSE_REQ")
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;
|
|
|
|
Registers.STATUS.Define(this)
|
|
.WithFlag(0, name: "RUNNING", valueProviderCallback: (_) => this.engineExecution.IsAlive)
|
|
.WithValueField(1, 10, name: "MPC", valueProviderCallback: (_) => (uint)this.mpc)
|
|
.WithFlag(11, name: "PAUSE_GNT", valueProviderCallback: (_) => false)
|
|
;
|
|
|
|
Registers.EV_STATUS.Define32(this)
|
|
.WithFlag(0, FieldMode.Read, name: "FINISHED", valueProviderCallback: _ => finishedStatus)
|
|
.WithFlag(1, FieldMode.Read, name: "ILLEGAL_OPCODE", valueProviderCallback: _ => illegalOpcodeStatus)
|
|
;
|
|
|
|
Registers.EV_PENDING.Define32(this)
|
|
.WithFlag(0, out finishedPending, FieldMode.Read | FieldMode.WriteOneToClear, name: "FINISHED", changeCallback: (_, __) => UpdateInterrupts())
|
|
.WithFlag(1, out illegalOpcodePending, FieldMode.Read | FieldMode.WriteOneToClear, name: "ILLEGAL_OPCODE", changeCallback: (_, __) => UpdateInterrupts())
|
|
;
|
|
|
|
Registers.EV_ENABLE.Define32(this)
|
|
.WithFlag(0, out finishedEnabled, name: "FINISHED", changeCallback: (_, __) => UpdateInterrupts())
|
|
.WithFlag(1, out illegalOpcodeEnabled, name: "ILLEGAL_OPCODE", changeCallback: (_, __) => UpdateInterrupts())
|
|
;
|
|
|
|
Registers.INSTRUCTION.Define(this)
|
|
.WithValueField(0, 32, valueProviderCallback: _ => this.engineRam.data[this.mpc])
|
|
;
|
|
}
|
|
|
|
private void UpdateInterrupts()
|
|
{
|
|
if (this.illegalOpcodeStatus)
|
|
{
|
|
this.illegalOpcodePending.Value = true;
|
|
}
|
|
if (this.finishedStatus)
|
|
{
|
|
this.finishedPending.Value = true;
|
|
}
|
|
IRQ.Set((this.illegalOpcodePending.Value && this.illegalOpcodeEnabled.Value)
|
|
|| (this.finishedPending.Value && this.finishedEnabled.Value));
|
|
}
|
|
|
|
public void WriteDoubleWord(long address, uint value)
|
|
{
|
|
RegistersCollection.Write(address, value);
|
|
}
|
|
|
|
public uint ReadDoubleWord(long offset)
|
|
{
|
|
return RegistersCollection.Read(offset);
|
|
}
|
|
|
|
public long Size { get { return 4096; } }
|
|
public DoubleWordRegisterCollection RegistersCollection { get; private set; }
|
|
|
|
public void Reset()
|
|
{
|
|
this.window = 0;
|
|
this.mpstart = 0;
|
|
this.mplen = 0;
|
|
this.mpresume = 0;
|
|
this.mpc = 0;
|
|
if (this.engineExecution != null) {
|
|
if (this.engineExecution.IsAlive) {
|
|
this.engineExecution.Abort();
|
|
}
|
|
this.engineExecution = null;
|
|
}
|
|
if (this.powerIsOn != null)
|
|
{
|
|
this.powerIsOn.Value = false;
|
|
}
|
|
}
|
|
|
|
private readonly Machine machine;
|
|
|
|
public GPIO IRQ { get; private set; }
|
|
|
|
private byte window;
|
|
private UInt16 mpstart;
|
|
private UInt16 mplen;
|
|
private UInt16 mpresume;
|
|
private int mpc;
|
|
private IFlagRegisterField powerIsOn;
|
|
private IFlagRegisterField pauseRequest;
|
|
|
|
private IFlagRegisterField illegalOpcodeEnabled;
|
|
private IFlagRegisterField illegalOpcodePending;
|
|
private bool illegalOpcodeStatus;
|
|
|
|
private IFlagRegisterField finishedEnabled;
|
|
private IFlagRegisterField finishedPending;
|
|
private bool finishedStatus;
|
|
|
|
private Thread engineExecution;
|
|
|
|
private EngineRam engineRam;
|
|
|
|
private enum Registers
|
|
{
|
|
WINDOW = 0x00,
|
|
MPSTART = 0x04,
|
|
MPLEN = 0x08,
|
|
CONTROL = 0x0c,
|
|
MPRESUME = 0x10,
|
|
POWER = 0x14,
|
|
STATUS = 0x18,
|
|
EV_STATUS = 0x1c,
|
|
EV_PENDING = 0x20,
|
|
EV_ENABLE = 0x24,
|
|
INSTRUCTION = 0x28
|
|
}
|
|
}
|
|
|
|
public static class ExtensionMethods
|
|
{
|
|
|
|
public static byte[] Concat(this byte[] first, byte[] second)
|
|
{
|
|
var buffer = new byte[first.Length + second.Length];
|
|
Buffer.BlockCopy(first, 0, buffer, 0, first.Length);
|
|
Buffer.BlockCopy(second, 0, buffer, first.Length, second.Length);
|
|
return buffer;
|
|
}
|
|
|
|
public static byte[] Concat(this byte[] first, byte second)
|
|
{
|
|
var buffer = new byte[first.Length + 1];
|
|
Buffer.BlockCopy(first, 0, buffer, 0, first.Length);
|
|
buffer[buffer.Length - 1] = second;
|
|
return buffer;
|
|
}
|
|
}
|
|
}
|