Add "_zicsr_zifencei" to "rv32imac" when describing the CPU core. This
is required by newer versions of the spec, and will eventually be a
requirement of Renode.
Signed-off-by: Sean Cross <sean@xobs.io>
When we started this project, all Renode Litex modules were 8-bits, and
we had to custom-make a 32-bit timer module. However, in the interim,
upstream has grown a 32-bit variant of this timer. As of this writing,
this change was made two years ago.
Remove our custom variant and use the upstream version instead.
Signed-off-by: Sean Cross <sean@xobs.io>
Give a "Betrusted" namespace to all of the peripherals. This will enable
us to upstream various modules without breaking compatibility with our
own versions of these peripherals.
Signed-off-by: Sean Cross <sean@xobs.io>
This audio codec lives on I2C and doesn't really do much for us.
However, by adding this device we can now pass `test oqc`.
The next step will be to implement `BetrustedI2S` which is where the
actual audio emulation occurs.
Signed-off-by: Sean Cross <sean@xobs.io>
This adds a working Ethernet implementation based on the WF200. It
currently gets connected to a Linux machine running a udhcpd server,
however it could also get connected to a TUN/TAP connection on Linux or
Mac.
Signed-off-by: Sean Cross <sean@xobs.io>
Emulate both the SPINOR block as well as the OSPI flash attached to it.
With this change, the PDDB can now be initialized and resets itself
properly. Additionally, data persists across virtual reboots.
Data does not persist across runs of the emulator. That will follow in
an upcoming patch.
Signed-off-by: Sean Cross <sean@xobs.io>
Connect the EC to the SoC. This allows for emulating both the EC and SoC
in tandem. Messages flow via a 16-bit bus. When data is not available,
`0xdddd` is returned.
There is a HOLD line that goes from the EC to the SoC. This is tied to
the inverse of presence of data in the EC FIFO -- when it's empty, HOLD
is `1`, and when there is data it's `0`.
Signed-off-by: Sean Cross <sean@xobs.io>
This image file should get loaded onto SPI flash rather than into RAM,
since RAM gets cleared by the bootloader now.
Place it at a location that matches real hardware.
Signed-off-by: Sean Cross <sean@xobs.io>