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https://github.com/saymrwulf/xous-core.git
synced 2026-11-08 04:56:43 +00:00
update renode to contain USB device mappings
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bunnie
parent
5f2eef3afd
commit
49dcbb0a8a
2 changed files with 54 additions and 20 deletions
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@ -116,6 +116,9 @@ spiflash: Memory.MappedMemory @ sysbus 0x20000000
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audio: Memory.MappedMemory @ sysbus 0xe0000000
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size: 0x00001000
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usbdev: Memory.MappedMemory @ sysbus 0xe0040000
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size: 0x00010000
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abracom_rtc: Sensors.ABRTCMC @ i2c 0x68
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@ -3,7 +3,7 @@
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
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<vendor>litex</vendor>
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<name>SOC</name>
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<description><![CDATA[Litex SoC 2021-08-29 18:32:03]]></description>
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<description><![CDATA[Litex SoC 2022-04-22 01:27:38]]></description>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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@ -449,11 +449,26 @@ addresses to 0x8000_0000]]></description>
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</field>
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</fields>
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</register>
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<register>
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<name>USBSELECT</name>
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<description><![CDATA[When set to ``1``, the spinal USB device core is selected]]></description>
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<addressOffset>0x0020</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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<field>
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<name>usbselect</name>
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<msb>0</msb>
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<bitRange>[0:0]</bitRange>
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<lsb>0</lsb>
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</field>
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</fields>
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</register>
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<register>
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<name>EV_STATUS</name>
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<description><![CDATA[This register contains the current raw level of the event7 event trigger.
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Writes to this register have no effect.]]></description>
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<addressOffset>0x0020</addressOffset>
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<addressOffset>0x0024</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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@ -519,7 +534,7 @@ Writes to this register have no effect.]]></description>
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<name>EV_PENDING</name>
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<description><![CDATA[When a event7 event occurs, the corresponding bit will be set in this register.
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To clear the Event, set the corresponding bit in this register.]]></description>
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<addressOffset>0x0024</addressOffset>
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<addressOffset>0x0028</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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@ -593,7 +608,7 @@ edge.]]></description>
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<name>EV_ENABLE</name>
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<description><![CDATA[This register enables the corresponding event7 events. Write a ``0`` to this
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register to disable individual events.]]></description>
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<addressOffset>0x0028</addressOffset>
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<addressOffset>0x002c</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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@ -658,7 +673,7 @@ register to disable individual events.]]></description>
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</registers>
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<addressBlock>
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<offset>0</offset>
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<size>0x2c</size>
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<size>0x30</size>
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<usage>registers</usage>
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</addressBlock>
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<interrupt>
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@ -1190,7 +1205,7 @@ register to disable individual events.]]></description>
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<register>
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<name>GIT_MAJOR</name>
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<description><![CDATA[Major git tag version. For example, this firmware was built from git tag
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``v0.9.0``, so this value is ``0``.]]></description>
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``v0.9.8``, so this value is ``0``.]]></description>
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<addressOffset>0x0008</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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@ -1206,7 +1221,7 @@ register to disable individual events.]]></description>
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<register>
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<name>GIT_MINOR</name>
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<description><![CDATA[Minor git tag version. For example, this firmware was built from git tag
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``v0.9.0``, so this value is ``9``.]]></description>
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``v0.9.8``, so this value is ``9``.]]></description>
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<addressOffset>0x000c</addressOffset>
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<resetValue>0x09</resetValue>
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<size>32</size>
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@ -1222,9 +1237,9 @@ register to disable individual events.]]></description>
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<register>
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<name>GIT_REVISION</name>
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<description><![CDATA[Revision git tag version. For example, this firmware was built from git tag
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``v0.9.0``, so this value is ``0``.]]></description>
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``v0.9.8``, so this value is ``8``.]]></description>
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<addressOffset>0x0010</addressOffset>
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<resetValue>0x00</resetValue>
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<resetValue>0x08</resetValue>
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<size>32</size>
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<fields>
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<field>
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@ -1238,10 +1253,10 @@ register to disable individual events.]]></description>
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<register>
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<name>GIT_GITREV</name>
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<description><![CDATA[First 32-bits of the git revision. This documentation was built from git rev
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``b481fff0``, so this value is 3028418544, which should be enough to check out
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``09f47e22``, so this value is 167018018, which should be enough to check out
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the exact git version used to build this firmware.]]></description>
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<addressOffset>0x0014</addressOffset>
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<resetValue>0xb481fff0</resetValue>
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<resetValue>0x9f47e22</resetValue>
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<size>32</size>
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<fields>
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<field>
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@ -2038,7 +2053,8 @@ register. To clear the Event, set the corresponding bit in this register.]]></d
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<msb>0</msb>
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<bitRange>[0:0]</bitRange>
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<lsb>0</lsb>
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<description><![CDATA[`1` if a `com_int` event occurred. This Event is triggered on a **rising** edge.]]></description>
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<description><![CDATA[`1` if a `com_int` event occurred. This Event is triggered on a **falling**
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edge.]]></description>
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</field>
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<field>
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<name>rtc_int</name>
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@ -2781,7 +2797,7 @@ sources (power, sha512, and engine25519)]]></description>
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<msb>5</msb>
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<bitRange>[5:5]</bitRange>
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<lsb>5</lsb>
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<description><![CDATA[Use COM hold falling as wakeup source]]></description>
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<description><![CDATA[Use COM hold falling edge plus COM irq rising edge as wakeup source]]></description>
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</field>
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<field>
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<name>rtc</name>
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@ -3320,7 +3336,7 @@ checked]]></description>
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<msb>8</msb>
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<bitRange>[8:8]</bitRange>
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<lsb>8</lsb>
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<description><![CDATA[current strobe value (for debugging)]]></description>
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<description><![CDATA[FIFO has readable characters]]></description>
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</field>
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</fields>
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</register>
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@ -3559,11 +3575,19 @@ checked]]></description>
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is no interlock or FIFO buffering on this, so you can lose characters if you
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inject too fast.]]></description>
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</field>
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</fields>
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</register>
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<register>
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<name>DISABLE</name>
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<addressOffset>0x0004</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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<field>
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<name>disable</name>
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<msb>8</msb>
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<bitRange>[8:8]</bitRange>
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<lsb>8</lsb>
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<msb>0</msb>
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<bitRange>[0:0]</bitRange>
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<lsb>0</lsb>
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<description><![CDATA[writing a 1 permanently disables the block, until the next cold boot]]></description>
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</field>
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</fields>
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@ -3571,7 +3595,7 @@ inject too fast.]]></description>
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</registers>
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<addressBlock>
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<offset>0</offset>
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<size>0x4</size>
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<size>0x8</size>
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<usage>registers</usage>
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</addressBlock>
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</peripheral>
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@ -3584,7 +3608,7 @@ inject too fast.]]></description>
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<name>SEED1</name>
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<description><![CDATA[Bits 32-63 of `SEED_SEED`. Seed used for the build]]></description>
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<addressOffset>0x0000</addressOffset>
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<resetValue>0x4de9a155</resetValue>
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<resetValue>0x686fb736</resetValue>
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<size>32</size>
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<fields>
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<field>
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@ -3599,7 +3623,7 @@ inject too fast.]]></description>
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<name>SEED0</name>
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<description><![CDATA[Bits 0-31 of `SEED_SEED`.]]></description>
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<addressOffset>0x0004</addressOffset>
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<resetValue>0x35aac807</resetValue>
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<resetValue>0x18712489</resetValue>
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<size>32</size>
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<fields>
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<field>
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@ -7011,6 +7035,11 @@ of the PLL]]></description>
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<baseAddress>0xE0020000</baseAddress>
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<size>0x00020000</size>
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</memoryRegion>
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<memoryRegion>
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<name>USBDEV</name>
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<baseAddress>0xE0040000</baseAddress>
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<size>0x00010000</size>
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</memoryRegion>
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<memoryRegion>
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<name>CSR</name>
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<baseAddress>0xF0000000</baseAddress>
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@ -7021,6 +7050,8 @@ of the PLL]]></description>
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<constant name="CONFIG_CLOCK_FREQUENCY" value="100000000" />
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<constant name="CONFIG_CPU_HAS_INTERRUPT" value="None" />
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<constant name="CONFIG_CPU_RESET_ADDR" value="2147483648" />
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<constant name="CONFIG_CPU_HAS_DCACHE" value="None" />
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<constant name="CONFIG_CPU_HAS_ICACHE" value="None" />
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<constant name="CONFIG_CPU_TYPE_VEXRISCV" value="None" />
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<constant name="CONFIG_CPU_VARIANT_STANDARD" value="None" />
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<constant name="CONFIG_CPU_HUMAN_NAME" value="VexRiscv" />
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