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uhd/host/docs/dboards.dox
Lars Amsel 2a575bf9b5 uhd: Add support for the USRP X410 
Co-authored-by: Lars Amsel <lars.amsel@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Cristina Fuentes <cristina.fuentes-curiel@ni.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
Co-authored-by: Lane Kolbly <lane.kolbly@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Andrew Lynch <andrew.lynch@ni.com>
Co-authored-by: Grant Meyerhoff <grant.meyerhoff@ni.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Thomas Vogel <thomas.vogel@ni.com>
2021-06-10 12:01:53 -05:00

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/*! \page page_dboards Daughterboards
\tableofcontents
\section dboards Daughterboard Properties
The following contains interesting notes about each daughterboard.
Eventually, this page will be expanded to list out the full properties
of each board as well.
\subsection dboards_basicrx Basic RX and LFRX
The Basic RX and LFRX boards have four modes of operation:
- **Antenna Mode A:** real signal from antenna RXA
- **Antenna Mode B:** real signal from antenna RXB
- **Antenna Mode AB:** complex signal using both antennas (IQ)
- **Antenna Mode BA:** complex signal using both antennas (QI)
The way in which you select the mode depends on the USRP type.
The X300 series will create subdevices 0 and 1 for each BasicRX or LFRX board.
The default is to make a channel for each subdevice. That can be controlled by
setting the subdev spec:
~~~{.cpp}
auto usrp = uhd::usrp::multi_usrp::make("type=x300");
usrp->set_rx_subdev_spec("A:1"); // Only 1 channel using subdevice 1 on Radio A
~~~
The antenna mode is selected for each channel using the antenna API:
~~~{.cpp}
auto usrp = uhd::usrp::multi_usrp::make("type=x300");
usrp->set_rx_antenna("A", 0); // Disable RXB port on channel 0
~~~
On the USRP2, the N200 series, the B100 series, the E100, and the USRP1 the mode
depends on the subdev spec applied:
~~~{.cpp}
auto usrp = uhd::usrp::multi_usrp::make("type=usrp2");
usrp->set_rx_subdev_spec("A:A"); // Disable RXB port
~~~
The boards have no tunable elements or programmable gains. Through the
magic of aliasing, you can down-convert signals greater than the Nyquist
rate of the ADC.
BasicRX Bandwidth:
- **For Real-Mode (Antenna Mode A or B)**: 250 MHz
- **For Complex (Antenna Mode AB or BA)**: 500 MHz
LFRX Bandwidth:
- **For Real-Mode (Antenna Mode A or B)**: 33 MHz
- **For Complex (Antenna Mode AB or BA)**: 66 MHz
\subsection dboards_basictx Basic TX and LFTX
The Basic TX and LFTX boards have 4 modes of operation:
- **Antenna Mode A:** real signal from antenna TXA
- **Antenna Mode B:** real signal from antenna TXB
- **Antenna Mode AB:** complex signal using both antennas (IQ)
- **Antenna Mode BA:** complex signal using both antennas (QI)
The boards have no tunable elements or programmable gains. Through the
magic of aliasing, you can up-convert signals greater than the Nyquist
rate of the DAC.
BasicTX Bandwidth:
- **For Real-Mode (Antenna Mode A or B**): 250 MHz
- **For Complex (Antenna Mode AB or BA)**: 500 MHz
LFTX Bandwidth:
- **For Real-Mode (Antenna Mode A or B)**: 33 MHz
- **For Complex (Antenna Mode AB or BA)**: 66 MHz
\subsection dboards_dbsrx DBSRX
The DBSRX board has 1 quadrature frontend. It defaults to direct
conversion but can use a low IF through lo_offset in uhd::tune_request_t.
Receive Antennas: **J3**
- **Frontend 0:** Complex baseband signal from antenna J3
The board has no user selectable antenna setting.
Receive Gains:
- **GC1**, Range: 0-56dB
- **GC2**, Range: 0-24dB
Bandwidth: 8 MHz - 66 MHz
Sensors:
- **lo_locked**: boolean for LO lock state
\subsection dboards_dbsrx2 DBSRX2
The DBSRX2 board has 1 quadrature frontend. It defaults to direct
conversion, but can use a low IF through `lo_offset` in uhd::tune_request_t.
Frequency Range: 800 MHz to 2.3 GHz
Receive Antennas: **J3**
- **Frontend 0:** Complex baseband signal from antenna J3
The board has no user-selectable antenna setting.
Receive Gains:
- **GC1**, Range: 0-73dB
- **BBG**, Range: 0-15dB
Bandwidth (Hz): 8 MHz-80 MHz
Sensors:
- **lo_locked**: boolean for LO lock state
Notes:
- When used in the X3x0, set the daughterboard clock rate to 100 MHz (see \ref config_devaddr)
\subsection dboards_rfx RFX Series
The RFX Series boards have 2 quadrature frontends: Transmit and Receive.
Transmit defaults to low IF, and Receive defaults to direct conversion.
The IF can be adjusted through lo_offset in uhd::tune_request_t.
The RFX Series boards have independent receive and transmit LO's and
synthesizers allowing full-duplex operation on different transmit and
receive frequencies.
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
- **Frontend 0:** Complex baseband signal for selected antenna
The user may set the receive antenna to be TX/RX or RX2. However, when
using an RFX board in full-duplex mode, the receive antenna will always
be set to RX2, regardless of the settings.
Receive Gains: **PGA0**, Range: 0-70dB (except RFX400 range is 0-45dB)
Bandwidth:
- **RX**: 40 MHz
- **TX**: 40 MHz
Sensors:
- **lo_locked**: boolean for LO lock state
\subsection dboards_xcvr XCVR 2450
\b Note: The XCVR2450 is not compatible with the X3x0-Series.
The XCVR2450 has 2 quadrature frontends, one transmit, one receive.
Transmit and Receive default to direct conversion but can be used in low
IF mode through lo_offset in uhd::tune_request_t.
The XCVR2450 has a non-contiguous tuning range consisting of a high band
(4.9-6.0 GHz) and a low band (2.4-2.5 GHz).
Transmit Antennas: **J1** or **J2**
Receive Antennas: **J1** or **J2**
- **Frontend 0:** Complex baseband signal for selected antenna
The XCVR2450 uses a common LO for both receive and transmit. Even though
the API allows the RX and TX LOs to be individually set, a change of one
LO setting will be reflected in the other LO setting.
The XCVR2450 does not support full-duplex mode, attempting to operate in
full-duplex will result in transmit-only operation.
Transmit Gains:
- **VGA**, Range: 0-30dB
- **BB**, Range: 0-5dB
Receive Gains:
- **LNA**, Range: 0-30.5dB
- **VGA**, Range: 0-62dB
Bandwidths:
- **RX**: 15 MHz, 19 MHz, 28 MHz, 36 MHz; (each +-0, 5, or 10%)
- **TX**: 24 MHz, 36 MHz, 48 MHz
Sensors:
- **lo_locked**: boolean for LO lock state
- **rssi**: float for rssi in dBm
\subsection dboards_wbx WBX Series
Features:
- 2 quadrature frontends (1 transmit, 1 receive)
- Defaults to direct conversion
- Can be used in low IF mode through lo_offset with uhd::tune_request_t
- Independent receive and transmit LO's and synthesizers
- Allows for full-duplex operation on different transmit and receive frequencies
- Can be set to use Integer-N tuning for better spur performance
with uhd::tune_request_t
Frequency Range: 50 MHz to 2.2 GHz
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
- **Frontend 0:** Complex baseband signal for selected antenna
- **Note:** The user may set the receive antenna to be TX/RX or RX2.
However, when using a WBX board in full-duplex mode, the receive
antenna will always be set to RX2, regardless of the settings.
Transmit Gains: **PGA0**, Range: 0-25dB
Receive Gains: **PGA0**, Range: 0-31.5dB
Bandwidths:
- **WBX**: 40 MHz, RX & TX
- **WBX-120**: 120 MHz, RX & TX
Sensors:
- **lo_locked**: boolean for LO lock state
\subsection dboards_sbx SBX Series
Features:
- 2 quadrature frontends (1 transmit, 1 receive)
- Defaults to direct conversion
- Can be used in low IF mode through lo_offset with uhd::tune_request_t
- Independent receive and transmit LO's and synthesizers
- Allows for full-duplex operation on different transmit and
receive frequencies
- Can be set to use Integer-N tuning for better spur performance with uhd::tune_request_t
Frequency Range: 400 MHz to 4.4 GHz
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
- **Frontend 0:** Complex baseband signal for selected antenna
- **Note:** The user may set the receive antenna to be TX/RX or RX2.
However, when using an SBX board in full-duplex mode, the receive
antenna will always be set to RX2, regardless of the settings.
Transmit Gains: **PGA0**, Range: 0-31.5dB
Receive Gains: **PGA0**, Range: 0-31.5dB
Bandwidths:
- **SBX**: 40 MHz, RX & TX
- **SBX-120**: 120 MHz, RX & TX
Sensors:
- **lo_locked**: boolean for LO lock state
LEDs:
- All LEDs flash when daughterboard control is initialized
- **TX LD**: Transmit Synthesizer Lock Detect
- **TX/RX**: Receiver on TX/RX antenna port (No TX)
- **RX LD**: Receive Synthesizer Lock Detect
- **RX1/RX2**: Receiver on RX2 antenna port
\subsection dboards_cbx CBX Series
Features:
- 2 quadrature frontends (1 transmit, 1 receive)
- Defaults to direct conversion
- Can be used in low IF mode through lo_offset with uhd::tune_request_t
- Independent receive and transmit LO's and synthesizers
- Allows for full-duplex operation on different transmit and
receive frequencies
- Can be set to use Integer-N tuning for better spur performance with uhd::tune_request_t
Frequency Range: 1.2 GHz to 6 GHz
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
- **Frontend 0:** Complex baseband signal for selected antenna
- **Note:** The user may set the receive antenna to be TX/RX or RX2.
However, when using a CBX board in full-duplex mode, the receive
antenna will always be set to RX2, regardless of the settings.
Transmit Gains: **PGA0**, Range: 0-31.5dB
Receive Gains: **PGA0**, Range: 0-31.5dB
Bandwidths:
- **CBX**: 40 MHz, RX & TX
- **CBX-120**: 120 MHz, RX & TX
Sensors:
- **lo_locked**: boolean for LO lock state
LEDs:
- All LEDs flash when daughterboard control is initialized
- **TX LD**: Transmit Synthesizer Lock Detect
- **TX/RX**: Receiver on TX/RX antenna port (No TX)
- **RX LD**: Receive Synthesizer Lock Detect
- **RX1/RX2**: Receiver on RX2 antenna port
\subsection dboards_ubx UBX Series
Features:
- 2 quadrature frontends (1 transmit, 1 receive)
- Defaults to direct conversion
- Can be used in low IF mode through lo_offset with uhd::tune_request_t
- Independent receive and transmit LO's and synthesizers
- Allows for full-duplex operation on different transmit and
receive frequencies
- Can be set to use Integer-N tuning for better spur performance with uhd::tune_request_t
Frequency Range: 10 MHz to 6 GHz
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
- **Frontend 0:** Complex baseband signal for selected antenna
- **Note:** The user may set the receive antenna to be TX/RX or RX2.
However, when using a UBX board in full-duplex mode, the receive
antenna will always be set to RX2, regardless of the settings.
Transmit Gains: **PGA0**, Range: 0-31.5dB
Receive Gains: **PGA0**, Range: 0-31.5dB
Bandwidths:
- **UBX**: 40 MHz, RX & TX
- **UBX-160**: 160 MHz, RX & TX
Sensors:
- **lo_locked**: boolean for LO lock state
LEDs:
- **LOCK**: Synthesizer Lock Detect
- **TX/RX TXD**: Transmitting on TX/RX antenna port
- **TX/RX RXD**: Receiving on TX/RX antenna port
- **RX2 RXD**: Receiving on RX2 antenna port
Notes:
- When used in the X300/X310 at frequencies below 1 GHz, it is necessary to
reduce the daughterboard clock rate to 20 MHz to achieve phase
synchronization and best RF performance (see \ref config_devaddr).
- The LO lock sensor for the UBX can intermittently fail to report True. In that
case, the UBX has a temperature compensation mode, which can be activated to
help the synthesizer to lock. It may also increase the tuning time, though,
which is why the default is to disable the temperature compensation mode.
To enable the temperature compensation mode, identify the property tree path
to the daughterboard, and set the `temp_comp_mode` to "enabled":
~~~~{.cpp}
// Assume DEV is a valid device, and we are talking to the UBX in motherboard 0
// in slot A:
DEV->get_tree()->access<std::string>("/mboards/0/rx_frontends/A/temp_comp_mode/value")
.set("enabled");
~~~~
\subsection dboards_twinrx TwinRX
Features:
- 2 super-heterodyne frontends (2 receive, 0 transmit)
- Digital IF of +/- 50 MHz
- Supports sharing one channel's LO to the other or the use of an external LO
- Allows multiple channels and daughterboards to be frequency and phase synchronized
Frequency Range: 10 MHz to 6 GHz
Receive Antennas: **RX1** and **RX2**
Receive Gain: 0-93dB
The TwinRX daughterboard only works with the X300/X310 motherboards, and
requires a master clock rate of 200 MHz.
More information:
\li \subpage page_twinrx
\subsection dboards_tvrx TVRX
The TVRX board has 1 real-mode frontend. It is operated at a low IF.
Receive Antennas: RX
- **Frontend 0:** real-mode baseband signal from antenna RX
Receive Gains:
- **RF**, Range: -13.3-50.3dB (frequency-dependent)
- **IF**, Range: -1.5-32.5dB
Bandwidth: 6 MHz
\subsection dboards_tvrx2 TVRX2
The TVRX2 board has 2 real-mode frontends. It is operated at a low IF.
Frequency Range: 50 MHz to 860 MHz
Receive Frontends:
- **Frontend RX1:** real-mode baseband from antenna J100
- **Frontend RX2:** real-mode baseband from antenna J140
Note: The TVRX2 has always-on AGC; the software controllable gain is the
final gain stage which controls the AGC set-point for output to ADC.
Receive Gains:
- **IF**, Range: 0.0-30.0dB
Bandwidth: 1.7 MHz, 6 MHz, 7 MHz, 8 MHz, 10 MHz
Sensors:
- **lo_locked**: boolean for LO lock state
- **rssi**: float for measured RSSI in dBm
- **temperature**: float for measured temperature in degC
Notes:
- The TVRX2 requires a 64 MHz, 100 MHz or 200 MHz reference clock. On the X3x0,
set the daughterboard clock rate accordingly (see \ref config_devaddr), typically
to 100 MHz.
\subsection dboards_e300 E310 MIMO XCVR board
Please refer to \ref e31x_dboards.
\subsection dboards_n310 N310 XCVR board
Please refer to \ref n3xx_mg.
\subsection dboards_zbx ZBX XCVR board
Features:
- Dual channel transceivers
- TX/RX and RX2 antenna ports per channel
- Frequency Range: 1 MHz to 8 GHz
- Relative Gain Range: 0 - 60 dB (RX gain range reduced below 500 MHz)
The ZBX daughterboard only works with the X410 motherboard.
More information:
\li \subpage page_zbx
\subsection dboards_clock_rate Daughterboard reference clock
The USRP motherboard provides a reference clock to the daughterboards, which
the daughterboards will use to generate LO signals or anything else that
requires a reference clock.
The X3x0 has a programmable reference clock, which might have to be changed
depending on various applications (see the daughterboard sections above).
However, it can provide only one daughterboard clock per device, which can
lead to conflicts. It might not be possible to use a specific daughterboard
together with all others.
\subsection dboards_dbsrxmod DBSRX - Modifying for other boards that USRP1
Due to different clocking capabilities, the DBSRX will require
modifications to operate on a non-USRP1 motherboard. On a USRP1
motherboard, a divided clock is provided from an FPGA pin because the
standard daughterboard clock lines cannot provided a divided clock.
However, on other USRP motherboards, the divided clock is provided over
the standard daughterboard clock lines.
\subsubsection dboards_dbsrxmod_1 Step 1: Move the clock configuration resistor
Remove **R193** (which is 10 Ohms, 0603 size), and put it on **R194**, which is
empty. This is made somewhat more complicated by the fact that the silkscreen
is not clear in that area. **R193** is on the back, immediately below the large
beige connector, **J2**. **R194** is just below, and to the left of **R193**.
The silkscreen for **R193** is ok, but for **R194**, it is upside down, and
partially cut off. If you lose **R193**, you can use anything from 0 to 10 Ohms
there.
\subsubsection dboards_dbsrxmod_2 Step 2: Burn a new daughterboard id into the EEPROM
With the daughterboard plugged-in, run the following commands:
cd <install-path>/lib/uhd/utils
./usrp_burn_db_eeprom --id=0x000d --unit=RX --args=<args> --slot=<slot>
- `<args>` are device address arguments (optional if only one USRP
device is on your machine)
- `<slot>` is the name of the daughterboard slot (optional if the
USRP device has only one slot)
\subsection dboards_rfxmod RFX - Modify to use motherboard oscillator
Older RFX boards require modifications to use the motherboard
oscillator. If this is the case, UHD software will print a warning about
the modification. Please follow the modification procedures below:
- Step 1: Disable the daughterboard clocks**
Move **R64** to **R84**. Move **R142** to **R153**.
- Step 2: Connect the motherboard blocks
Move **R35** to **R36**. Move **R117** to **R115**. These are all 0-Ohm,
so if you lose one, just short across the appropriate pads.
- Step 3: Burn the appropriate daughterboard ID into the EEPROM
With the daughterboard plugged in, run the following commands: :
cd <install-path>/lib/uhd/utils
./usrp_burn_db_eeprom --id=<rx_id> --unit=RX --args=<args> --slot=<slot>
./usrp_burn_db_eeprom --id=<tx_id> --unit=TX --args=<args> --slot=<slot>
- `<rx_id>` choose the appropriate RX ID for your daughterboard
- **RFX400:** 0x0024
- **RFX900:** 0x0025
- **RFX1800:** 0x0034
- **RFX1200:** 0x0026
- **RFX2400:** 0x0027
- `<tx_id>` choose the appropriate TX ID for your daughterboard
- **RFX400:** 0x0028
- **RFX900:** 0x0029
- **RFX1800:** 0x0035
- **RFX1200:** 0x002a
- **RFX2400:** 0x002b
- `<args>` are device address arguments (optional if only one USRP device is on your machine)
- `<slot>` is the name of the daughterboard slot (optional if the USRP device has only one slot)
*/
// vim:ft=doxygen:
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