10 commits

Author	SHA1	Message	Date
Josh Blum	12223186e7	fifo ctrl: spi core work and host implementation	2012-03-23 14:36:56 -07:00
Josh Blum	1bf0619c9e	usrp2: configured clock delay over mimo cable	2010-12-11 18:43:10 -08:00
Nick Foster	0336b6fb35	packet_router: added set_mimo_clock_delay to clock_ctrl. ... Delay range is fixed right now to [0.444, 9.744]ns in 300ps increments	2010-12-11 18:43:10 -08:00
Josh Blum	8af031ad89	usrp-n: configure clocking over the serdes cable ... added status to register to readback master/slave mode removed mimo enum from clock config, its not relevant added serdes clock config to the update clock config method	2010-12-11 18:43:10 -08:00
Nick Foster	b6dae16e5b	USRP2P: internal reference selected by default.	2010-10-05 16:54:34 -07:00
Josh Blum	7aeb266783	added set clock rate, and get clock rates to dboard iface, usrp2 needs clock ctrl implementation...	2010-06-17 11:36:14 -07:00
Josh Blum	4f0736ef7c	move get clock rate into clock control	2010-06-04 12:32:06 -07:00
Josh Blum	f2b560d5f8	Prepend usrp2 onto the helper classes in usrp2 impl to avoid symbol conflicts.	2010-06-04 12:16:09 -07:00
Josh Blum	7c7b0d0a0d	Added a place for serdes control on the host. ... Fix bug in codec control. Comment out some clock control in fw code.	2010-05-10 16:37:12 -07:00
Josh Blum	bf7ef6aeb5	Moved adc and dac control into codec control source file. ... The codec control powers down the chips on destruction.	2010-05-10 15:14:48 -07:00

Renamed from host/lib/usrp/usrp2/clock_control.hpp (Browse further)