9 commits

Author	SHA1	Message	Date
Ashish Chaudhari	282b31cedd	ad9361: Fixed TX direction bug in ad9361_ctrl	2014-08-13 11:04:23 -07:00
Ashish Chaudhari	09898c18f4	ad9361: Added synchronization to IO and device classes	2014-08-13 10:40:39 -07:00
Ashish Chaudhari	9ad16ae70e	ad9361: Converted stdint types to boost types	2014-08-12 18:51:29 -07:00
Ashish Chaudhari	675350a1d6	b200, ad9361: Cleanup up AD9361 driver ... - Removed transaction interface - Made the driver a C++ class	2014-08-12 18:28:36 -07:00
Ashish Chaudhari	c7274790a0	b200: Moved AD9361 driver to host ... - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow	2014-08-01 13:14:56 -07:00
Balint Seeber	ea66e24a96	b200: changed ad9361 read timeout handling (kicks in when requesting master_clock_rate above 56MHz)	2014-03-19 15:53:27 -07:00
Josh Blum	cd9763f94f	uhd: strnlen for platforms w/o it	2013-07-25 18:47:34 -04:00
Josh Blum	d251a7a55b	b200: use existing query rate calls to clip	2013-07-19 14:45:24 -07:00
Josh Blum	bb73a21495	uhd: squashed support modules for usrp3 fpga cores	2013-07-19 14:00:32 -07:00