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116 commits

Author SHA1 Message Date
Ben Hilburn
0e39127672 Squashed commit uhd/cleanup. 2013-11-27 11:53:38 -08:00
Philip Balister
3b1886ea2e e100 : Adapt kernel header to work in user space. 2011-07-08 13:11:42 -07:00
Philip Balister
09087ca7b4 Update usrp_e kernel header file copies. 
This drops spi and i2c support in the kernel driver.
 2011-07-08 13:11:12 -07:00
Philip Balister
a8f7839af3 usrp_e100: Move gpio test program to utils. 
Still needs changing to use the new register map header.
 2011-03-16 05:25:22 -07:00
Philip Balister
5287fd580b usrp_e100: Delete old test scripts. 2011-03-16 05:22:27 -07:00
Philip Balister
a7f9529f77 usrp-e-utils : Delete more old files. 2011-02-21 08:05:54 -08:00
Philip Balister
40f58d26c2 usrp-e-utils : Remove old files. 2011-02-21 07:45:39 -08:00
Philip Balister
7a786b4eca usrp-e-crc-rw : Work with GU fpga image. Cleaned up warnings. 2011-02-21 04:20:50 -08:00
Philip Balister
78a7cea143 usrp-e-mm-loopback : Works with GU fpga image. Cleaned up warnings. 2011-02-21 04:20:10 -08:00
Philip Balister
d04939215f Add back line that mysteriously disappeared. I blame the cat. 2011-02-16 02:10:36 -08:00
Philip Balister
d6897fc468 usrp-e-timed test program. Add checks for packet length and sequence 
number.
 2011-02-16 00:22:07 -08:00
Philip Balister
9f3ecefbc5 usrp-e-crc-rw: Fix data rate calculation. 2011-02-15 02:08:33 -08:00
Philip Balister
c9b3cb60e1 usrp-e100: Check in wip for timed image test program. 2011-02-14 22:00:40 -08:00
Philip Balister
206a70cb82 Fix typo in usage message. 2011-02-08 08:40:47 -08:00
Philip Balister
15ae6f2859 Fixes for timed fpga interface test program. Still need to solve the CRC 
calculation failures.
 2011-02-01 07:20:56 -08:00
Philip Balister
867240ac5d Start converting the timed test program to work with mmap interface. 2011-01-26 15:52:33 -08:00
Philip Balister
b0ecd1c7d3 Update header from in e100 test programs from main uhd. 2011-01-26 15:51:54 -08:00
Philip Balister
0f75a69fa0 Mark received block as accepted by user space. 2011-01-26 14:44:23 -08:00
Philip Balister
de5c86d210 Update timed crc test program to use mmap's interface. Needs testing. 2011-01-25 19:10:54 -08:00
Philip Balister
db0e3e574e usrp_e: Add driver compatibility ioctl to header file. 2010-10-21 22:26:53 -04:00
root
dd9f9c340a Ignore direction for GPIO 114 since it is always an input. 2010-09-30 18:25:24 +00:00
Philip Balister
77cdb4a969 Use a dummy write to start DMA transfers when sending data to the FPGA. 
Poll will also start data transfers.
 2010-09-21 20:06:43 +00:00
Philip Balister
943bfa271c Use the ring buffer sizes read from the kernel. 2010-09-21 19:59:02 +00:00
Philip Balister
380889798a Convert write to use the mmap interface. 2010-09-21 19:47:32 +00:00
Philip Balister
d6c4fbb29e Read the ring buffer size from the kernel and use that to set up the 
structures that read and write the ring buffer.
 2010-09-21 18:07:25 +00:00
Philip Balister
d4a80a2b93 Fix ring buffer size calculation. 2010-09-21 15:06:00 +00:00
root
7888b861d5 Fix really dumb mistake in rad ring buffer code. Add/comment debug 
lines.
 2010-09-20 20:31:52 +00:00
Philip Balister
a58b90ef21 Convert to use mmaped rx ring buffer. 2010-08-11 22:23:40 +00:00
Philip Balister
74e5238d08 Convert non-mmaped loopback test program to use new simple read/write api. 
Done by copying from the -mm version, which will be used to test mmaped
ring buffer.
 2010-08-11 17:53:53 +00:00
Philip Balister
6ce879c36a Add usrp-e-mm-loopback to .gitignore. 2010-08-11 17:23:42 +00:00
Philip Balister
cb92934527 Loopback test now supports variable size and works with mmapable ring buffer. 2010-08-11 01:05:47 +00:00
Philip Balister
cd537e846a Add gitignore file. 2010-06-15 20:53:28 +00:00
Philip Balister
617488fd6a Rename loopback of random length packets test program so we know it needs 
loopback fpga image. Needs debug.
 2010-06-13 19:24:35 +00:00
Philip Balister
7edefe21d6 Exit on errors. Run until an error occurs. Alloq for up to 2 sequence 
number errors so program can start with "dirty" fpga contents.
 2010-06-13 19:24:23 +00:00
Philip Balister
8869208ea8 Update usrp_e.h file. Change programs to use struct element status instead of flags. 2010-06-13 19:24:15 +00:00
Josh Blum
ac62d187cc reverted usrp-e-led sorry 2010-05-28 17:41:01 +00:00
Josh Blum
e940d02259 Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e 
Conflicts:
	host/utils/CMakeLists.txt
 2010-05-27 23:09:09 +00:00
Philip Balister
f113ae1786 Divide by 4 to convert byts/sec to samples/sec. Multiply by 4 is right out. 2010-05-23 12:58:58 +00:00
Philip Balister
85e32e2982 Work on crc testing program. Currently dumps first received packet to the 
screen. Started to reduce teh number of warnings.
 2010-05-21 21:13:25 +00:00
Philip Balister
96ef5b171b OK, now crc uses the timed interface to set the data rate. 
Revert "Revert "Revert "Update test program to reflect what is in the FPGA image."""

This reverts commit b5dfe74e99.

Conflicts:

	host/apps/omap_debug/usrp-e-crc-rw.c
 2010-05-21 10:15:54 -04:00
Philip Balister
64276eabd8 Rename loopback test program to match bin file name. 2010-05-20 15:10:32 +00:00
Philip Balister
a9fefde874 Enable realtime scheduling in loopback test to prevent overruns. 2010-05-20 15:05:04 +00:00
Philip Balister
3bb874f806 Display data rate in samples/second and fix typo. 2010-05-19 22:27:06 +00:00
Philip Balister
090d066570 Calculate received sample rate for loopback test. 2010-05-19 22:26:14 +00:00
Philip Balister
fe753af7e6 Use better optimization settings. 2010-05-19 22:25:29 +00:00
Philip Balister
d6fc36cb7a Fix initialization bug. 2010-05-19 17:41:11 +00:00
Philip Balister
88b2a958f0 Rename test program to match FPGA bin file name and add data rate calculation. 2010-05-19 13:21:45 -04:00
Philip Balister
ad01832ca5 Keep repo in sync with my churn ... 2010-05-19 15:01:23 +00:00
Philip Balister
e62fd331f3 Comment out progress indicators. 2010-05-18 17:59:04 +00:00
Philip Balister
b5dfe74e99 Revert "Revert "Update test program to reflect what is in the FPGA image."" 
This reverts commit 7d0a98fc33.

Must make filenames more different.
 2010-05-18 13:56:57 -04:00