pulp-runtime/kernel/chips/control-pulp
bluew 026a98d56a pulp-runtime: Fix uart frequency and bad fll access
Control-pulp doesn't have an FLL so we hardcode the frequency domain
values. Furthermore we allow these hardcoded values to change depending
on whether we target the FPGA (zcu102) or rtl sim.
2021-11-04 17:47:57 +01:00
..
link.ld Add support for control-pulp 2021-07-13 17:33:01 +02:00
soc.c pulp-runtime: Fix uart frequency and bad fll access 2021-11-04 17:47:57 +01:00