mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-14 20:48:09 +00:00
154 lines
No EOL
3.1 KiB
ArmAsm
154 lines
No EOL
3.1 KiB
ArmAsm
#
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# Copyright (C) 2019 ETH Zurich, University of Bologna
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#include "archi/pulp.h"
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#include "pulp.h"
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.section .text
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.global pos_init_entry
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pos_init_entry:
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# Performance counters are active after reset, deactivate them to let the
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# user control when they should start counting
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csrw 0x7A1, x0
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# Cluster PEs will also starts here to avoid aligning another entry point
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# Just re-route them to the right entry
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#if defined(ARCHI_HAS_CLUSTER)
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csrr a0, 0xF14
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andi a1, a0, 0x1f
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srli a0, a0, 5
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li a2, ARCHI_FC_CID
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bne a0, a2, pe_start
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#endif
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# Clear the bss segment
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la t0, _bss_start
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la t1, _bss_end
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1:
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sw zero,0(t0)
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addi t0, t0, 4
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bltu t0, t1, 1b
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# Stack initialization
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la x2, stack
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/* Do all other initializations from C code */
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jal x1, pos_init_start
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.section .text
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# On all other chips we simply pass 0.
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addi a0, x0, 0
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addi a1, x0, 0
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# Jump to main program entry point (argc = a0, argv = a1).
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la t2, main
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jalr x1, t2
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mv s0, a0
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/* Do all other deinitializations from C code */
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jal x1, pos_init_stop
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# If program returns from main, call exit routine
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mv a0, s0
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jal x1, exit
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.section .vectors, "ax"
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.option norvc;
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#ifdef ARCHI_CORE_HAS_1_10
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j pos_illegal_instr
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#else
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j pos_no_irq_handler
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#endif
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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j pos_no_irq_handler
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.org 0x80
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.global _start
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_start:
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jal x0, pos_init_entry
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pos_illegal_instr:
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j pos_irq_illegal_instr
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pos_no_irq_handler:
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mret
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.global pos_semihosting_call
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pos_semihosting_call:
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ebreak
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jr ra
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#if defined(ARCHI_HAS_CLUSTER)
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pe_start:
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la x2, cluster_stacks
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li x3, CLUSTER_STACK_SIZE
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addi a1, a1, 1
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mul x1, x3, a1
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add x2, x2, x1
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j cluster_entry_stub
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#endif |