mirror of
https://github.com/saymrwulf/pulp-runtime.git
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70 lines
No EOL
2.6 KiB
C
70 lines
No EOL
2.6 KiB
C
/*
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* Copyright (C) 2018 ETH Zurich and University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __ARCHI_SOC_EU_SOC_EU_V3_H__
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#define __ARCHI_SOC_EU_SOC_EU_V3_H__
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#define SOC_EU_EVENT 0x00
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#define SOC_FC_FIRST_MASK 0x10
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#define SOC_CL_FIRST_MASK 0x20
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#define SOC_PR_FIRST_MASK 0x30
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#define SOC_ERR_FIRST_MASK 0x40
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#define SOC_TIMER_SEL_HI 0x08
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#define SOC_TIMER_SEL_LO 0x0C
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// compatibility definitions
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#define SOC_FC_MASK_LSB SOC_FC_FIRST_MASK
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#define SOC_FC_MASK_MSB (SOC_FC_FIRST_MASK + 0x4)
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#define SOC_CL_MASK_LSB SOC_CL_FIRST_MASK
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#define SOC_CL_MASK_MSB (SOC_CL_FIRST_MASK + 0x4)
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#define SOC_PR_MASK_LSB SOC_PR_FIRST_MASK
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#define SOC_PR_MASK_MSB (SOC_PR_FIRST_MASK + 0x4)
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#define SOC_EU_EVENT_0 0x1
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#define SOC_EU_EVENT_1 0x2
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#define SOC_EU_EVENT_2 0x4
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#define SOC_EU_EVENT_3 0x8
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#define SOC_EU_EVENT_4 0x10
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#define SOC_EU_EVENT_5 0x20
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#define SOC_EU_EVENT_6 0x40
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#define SOC_EU_EVENT_7 0x80
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#define SOC_TIMER_SEL_ENABLE_SHIFT 31
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#define SOC_TIMER_SEL_EVT_SHIFT 0
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#define SOC_TIMER_SEL_EVT_WIDTH 8
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#define SOC_TIMER_SEL_EVT_MASK ((~0U) >> (32 - SOC_TIMER_SEL_EVT_WIDTH))
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// #define SOC_TIMER_SEL_EVT_MASK 0xff
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#define SOC_TIMER_SEL_ENABLE_DISABLED 0
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#define SOC_TIMER_SEL_ENABLE_ENABLED 1
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#define SOC_TIMER_SEL_ENABLE_DIS (0 << SOC_TIMER_SEL_ENABLE_SHIFT)
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#define SOC_TIMER_SEL_ENABLE_ENA (1 << SOC_TIMER_SEL_ENABLE_SHIFT)
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#define SOC_TIMER_SEL_EVT_VAL(val) ((val) << SOC_TIMER_SEL_EVT_SHIFT)
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// related to XX_FIRST_MASK registers
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#define SOC_NB_EVENT_REGS 4
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#define SOC_NB_EVENT_TARGETS 3
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#define SOC_FC_MASK(x) (SOC_FC_FIRST_MASK + (x)*4)
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#define SOC_CL_MASK(x) (SOC_CL_FIRST_MASK + (x)*4)
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#define SOC_PR_MASK(x) (SOC_PR_FIRST_MASK + (x)*4)
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#define ARCHI_SOC_EVENT_PERIPH_EVT_BASE(periph) ((periph)*ARCHI_SOC_EVENT_UDMA_NB_CHANNEL_EVT)
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#endif |