* Add configuration register to set AVS mode
* Add connections to the SPI controller and txrx interface
* Set idle level of sdio[0] signal of SPI master to '1', according to
the AVS protocol
* Add SPI slave device capability to trigger an event for requesting a read from
master by driving low the MISO (SDATA for AVS) when AVS mode is set.
This happens during tx/rx idle phases
* Add basic Write commit/Read test with pulp-runtime. AVS slave is
simulated in tb_avs.sv and tb_avs_fpga.sv.
Control-pulp doesn't have an FLL so we hardcode the frequency domain
values. Furthermore we allow these hardcoded values to change depending
on whether we target the FPGA (zcu102) or rtl sim.
