Matthias Breithaupt
c07c3641c9
Efinix Ti375 C529 Dev-Kit: Fix FMC LPC pinout
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This fixes the pinout from the previous commit, as that one accidentally
used the FMC pin names, rather than the FPGA ones.
Signed-off-by: Matthias Breithaupt <m.breithaupt@vogl-electronic.com>
2025-01-29 16:08:36 +01:00
enjoy-digital
0534c06b78
Merge pull request #641 from cleverfox/master
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Add colorlight 5A-75E v8.2 board
2025-01-27 08:50:43 +01:00
Vladimir
e20e9ba24a
Add colorlight 5A-75E v8.2 platform
2025-01-25 19:32:16 +07:00
Fin Maaß
715dfe7178
targets: efinix_ti375_c529_dev_kit: use python api for DDR
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use the efinix python api for the DRAM Block.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-24 13:33:10 +01:00
Fin Maaß
42a7db0ef3
targets: efinix_ti375_c529_dev_kit: simplify ddr part
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simplify ddr part by using ``axi_bus.get_ios()`` and
``axi_bus.connect_to_pads``.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-24 13:33:10 +01:00
Fin Maaß
3db7c017b4
targets: efinix_ti375_c529_dev_kit: be able to use ddr memory on all cpus
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be able to use ddr memory on all cpus,
including those without a seperate memory bus.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-24 13:33:10 +01:00
enjoy-digital
c56c870a3f
Merge pull request #639 from Peter-van-Tol/tang-nano-20k-fix-connector
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Add missing pin on J6
2025-01-24 09:16:13 +01:00
Peter-van-Tol
f1c8df6cb6
Add missing pin on J6
2025-01-22 10:02:18 +01:00
Fin Maaß
a909389a25
targets: efinix_ti375_c529_dev_kit: add ethernet/etherbone support
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add ethernet/etherbone support for efinix_ti375_c529_dev_kit.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-21 10:15:12 +01:00
Fin Maaß
f86a40d7f3
platforms: efinix_ti375_c529_dev_kit: move cpu eth
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add missing default_clk_freq.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-21 10:09:09 +01:00
Fin Maaß
63d3adcb9e
targets: efinix_ti375_c529_dev_kit: move cpu eth
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don't create clockdomains and plls tor the vexiiriscv cpu eth,
if they are not activated or used.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-01-21 10:08:08 +01:00
Florent Kermarrec
10ce757361
platforms/sqrl_acorn: Fix debug pin order.
2025-01-17 09:55:08 +01:00
enjoy-digital
5fa7f08a84
Merge pull request #635 from kscz/master
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Add in colorlight v8.2 board support
2025-01-14 08:22:34 +01:00
Matthias Breithaupt
cfadc12901
Efinix Ti375 C529 Dev-Kit: Add FMC LPC connector
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This adds the pinout of the FMC LPC connector on the Efinix Ti375 C529
Dev-Kit.
Signed-off-by: Matthias Breithaupt <m.breithaupt@vogl-electronic.com>
2025-01-13 16:08:45 +01:00
Kit Sczudlo
849e7a5a01
Add in colorlight v8.2 board support
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Based on https://github.com/q3k/chubby75/blob/master/5a-75b/hardware_V8.2.md
it appears that the pinout v8.0 is the same as the v8.2, the only difference
is the Lattice ECP5 LFE5U-25F-7BG256I
2025-01-04 13:47:20 -08:00
enjoy-digital
e1947384a9
Merge pull request #633 from uglyoldbob/nano
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Add hdmi conector to tang nano 20k and connector pinout.
2024-12-30 20:15:59 +01:00
Thomas Epperson
e7cc6c14f8
Add hdmi conector to tang nano 20k and connector pinout.
2024-12-26 09:24:08 -06:00
Andelf
f66179b009
Add support for LCKFB LJPI
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See-also: https://wiki.lckfb.com/zh-hans/fpga-ljpi/
2024-12-24 10:20:52 +08:00
Florent Kermarrec
97b3824f40
targets: +x on trenz_te0890.py.
2024-12-18 11:09:33 +01:00
enjoy-digital
8e00ca60b6
Merge pull request #630 from FlyGoat/alibaba_vu13p
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Add support for Alibaba VU13P
2024-12-18 11:08:15 +01:00
enjoy-digital
a15fbb6f38
Merge pull request #631 from andelf/enhance/sipeed_tang_name_20k
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sipeed_tang_nano_20k: add SPI flash and HDMI support
2024-12-17 19:33:11 +01:00
Andelf
2d25408a30
targets/sipeed_tang_nano_20k.py: add spi flash and hdmi support
2024-12-18 01:12:22 +08:00
Gwenhael Goavec-Merou
89d96a3e6b
Merge pull request #629 from trabucayre/genesys_toolchain_arg
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targets/digilent_genesys2.py: added toolchain option (#624 )
2024-12-17 17:03:57 +01:00
Jiaxun Yang
e8e833dc19
Add support for Alibaba VU13P
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Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-12-16 16:25:21 +00:00
Gwenhael Goavec-Merou
4e2d8bd84b
targets/efinix_trion_t20_mipi_dev_kit.py: cosmetic
2024-12-14 08:05:29 +01:00
Gwenhael Goavec-Merou
b2b8a3cbef
targets/digilent_genesys2.py: added toolchain option ( #624 )
2024-12-14 07:37:33 +01:00
Kanken6174
1727d30175
simple flash fix for the efinix T20 MIPI DK
2024-12-13 20:16:41 +01:00
Yu-Ti Kuo
d7f2b5a929
Add embedfire_rise_pro
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Add Flash
2024-12-07 17:17:55 +08:00
Florent Kermarrec
041c1607ce
platforms/sqrl_acorn: Add automatic FTDI Chip detection, add OpenFPGALoader suppport (and switch to it by default), remove VivadoProgrammer support.
2024-11-21 08:40:03 +01:00
enjoy-digital
fcb83fa375
Merge pull request #621 from Philip-K/master
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Add support for S7 Mini (TE0890).
2024-11-16 18:40:34 +01:00
enjoy-digital
49c6c83378
Merge branch 'master' into ti375_c529
2024-11-16 18:39:17 +01:00
enjoy-digital
0e77cdf3c8
Merge pull request #616 from maass-hamburg/efinix_reset_pulse
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efinix: fix reset
2024-11-16 18:37:10 +01:00
Phil Kirkpatrick
a7d4422735
Add support for S7 Mini (TE0890).
2024-11-09 17:12:11 +01:00
Gwenhael Goavec-Merou
15ad3ab341
platforms/limesdr_mini_v2.py: commented spiflash clk pad. Must be used via USRMCLK. Automatically done by LiteSPI
2024-11-09 07:20:51 +01:00
Oleg Libin
eb43cd3ca9
Update sipeed_tang_nano_4k.py
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replace kB to KILOBYTE
2024-11-08 15:54:00 +05:00
Gwenhael Goavec-Merou
3b8c55802f
platforms/limesdr_mini_v2.py: fixed SPI Flash pinout MOSI <-> MISO
2024-11-06 16:58:11 +01:00
Dolu1990
4c61bac2db
efinix_ti375_c529_dev_kit now support vexii ethernet
2024-11-01 09:33:42 +01:00
Gwenhael Goavec-Merou
0eabebfb05
platforms/xilinx_zcu102.py: Add all SFP connectors
2024-10-10 07:34:57 +02:00
Fin Maaß
362a28b72a
efinix: fix reset
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fix reset on all efinix boards.
To reset the PLL a pulse is needed, which
has to be driven by a clock that is
not generated by the PLL.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-08 13:51:09 +02:00
Fin Maaß
88f7d5f019
finix_trion_t20_bga256_dev_kit: fix ClockSignal
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Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-08 13:27:59 +02:00
Gwenhael Goavec-Merou
77cb9a5c17
Merge pull request #615 from machdyne/master
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add support for Mozart MX2
2024-10-05 08:57:55 +02:00
inc
399f10fdf9
add support for Mozart MX2
2024-10-05 08:16:18 +02:00
Pepijn de Vos
9d68972fa8
Update tec0117 to work with Apicula
2024-10-04 15:25:39 +02:00
Florent Kermarrec
8f1350ec40
targets/digilent_netfpga_sume.py: Limit mapped SDRAM size as on other targets.
2024-09-20 13:09:48 +02:00
Florent Kermarrec
223367d6b6
targets: +x on missing targets.
2024-09-20 13:03:17 +02:00
Gustav
2d3a6b81e6
Add support for NetFPGA-Sume ( #604 )
2024-09-18 11:21:51 +02:00
Apostolos - Nikolaos Vailakis
1cfd32698c
Add support for Signaloid C0-microSD ( #601 )
2024-09-18 10:48:57 +02:00
Gwenhael Goavec-Merou
3050716e8e
boards: digilent_nexys4ddr, kosagi_netv2, sipeed_tang_primer_20k: added eth_ip/remote_ip arg
2024-09-13 15:40:12 +02:00
Florent Kermarrec
4604379f46
platforms/sqrl_xcu1525: Revert previous commit, clk constraints were already present in DDR4 constraints.
2024-09-13 09:45:24 +02:00
Florent Kermarrec
90ff3d1ea9
platforms/sqrl_xcu1525.py: Add constraints on 300MHz clks.
2024-09-13 09:42:59 +02:00
