mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-04 04:27:34 +00:00
ffcccab513
This updates renode's emulation to match the current system design. Signed-off-by: Sean Cross <sean@xobs.io>
83 lines
1.8 KiB
Text
83 lines
1.8 KiB
Text
cpu: CPU.VexRiscv @ sysbus
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timeProvider: cpu_timer
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cpuType: "rv32imac"
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privilegeArchitecture: PrivilegeArchitecture.Priv1_10
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uart: UART.LiteX_UART @ {
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sysbus 0x60008000;
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sysbus 0xF0008000 // shadow
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}
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-> cpu@1002
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uartconsole: UART.LiteX_UART @ {
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sysbus 0x6000A000;
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sysbus 0xF000A000 // shadow
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}
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-> cpu@1003
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uartserver0: UART.LiteX_UART @ {
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sysbus 0x6000C000;
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sysbus 0xF000C000 // shadow
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}
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-> cpu@1004
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uartserver1: UART.LiteX_UART @ {
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sysbus 0x6000E000;
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sysbus 0xF000E000 // shadow
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}
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-> cpu@1005
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timer0: Timers.LiteX_Timer_32 @ {
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sysbus 0x60003000;
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sysbus 0xF0003000 // shadow
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}
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frequency: 12000000
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-> cpu@1001
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//spi: SPI.PicoRV_SPI @ {
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// sysbus 0x60004000;
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// sysbus 0xe0004000 // shadow
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//}
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rom: Memory.MappedMemory @ {
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sysbus 0x00000000;
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sysbus 0x80000000 // shadow
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}
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size: 0x00002000
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sram: Memory.MappedMemory @ {
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sysbus 0x40000000;
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sysbus 0x90000000 // shadow
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}
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size: 16777216
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fbmem: Memory.MappedMemory @ sysbus 0xB0000000
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size: 0x6000
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memlcd: Video.BetrustedLCD @ sysbus 0xF0011000
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kbd: Input.BetrustedKbd @ sysbus 0xF0006000
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cpu_timer: Timers.LiteX_CPUTimer @ sysbus 0xf0000800
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frequency: 100000000
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// IRQ #100 is Machine Timer Interrupt
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-> cpu@100
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ticktimer: Timers.TickTimer @ sysbus 0xf0016000
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periodInMs: 1
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//flash: SPI.Micron_MT25Q @ spi
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// underlyingMemory: flash_mem
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flash_mem: Memory.MappedMemory @ {
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sysbus 0x20000000;
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sysbus 0xA0000000 // shadow
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}
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size: 0x8000000
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sysbus:
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init:
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Tag <0xe0000000 0x800> "CTRL"
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Tag <0xE0006000 0x800> "REBOOT"
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Tag <0xE0006800 0x800> "RGB"
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Tag <0xE0007000 0x800> "VERSION"
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