mirror of
https://github.com/saymrwulf/xous-core.git
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124040bbb3
The kernel stack offset should be aligned to 16 bytes. Previously it was aligned to 8 bytes. It's unclear if this was the cause of any issues, but it is best practice to keep things aligned to 16 bytes. As part of this, key the atomic instructions off of the CPP macro presence of atomic instructions. Signed-off-by: Sean Cross <sean@xobs.io>
36 lines
1.5 KiB
PowerShell
36 lines
1.5 KiB
PowerShell
# SPDX-FileCopyrightText: 2020 Sean Cross <sean@xobs.io>
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# SPDX-FileCopyrightText: 2023 Foundation Devices, Inc <hello@foundationdevices.com>
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# SPDX-License-Identifier: Apache-2.0
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param ($Arch="riscv")
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$crate = "xous-kernel"
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New-Item -Force -Path bin -Type Directory | Out-Null
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Switch ($Arch) {
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"riscv" {
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# remove existing blobs because otherwise this will append object files to the old blobs
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Remove-Item -Force bin/riscv*.a
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riscv-none-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32imac_zicsr_zifencei src/arch/riscv/asm.S -o bin/$crate.o
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riscv-none-elf-ar crs bin/riscv32imac-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-ar crs bin/riscv32imac-unknown-xous-elf.a bin/$crate.o
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riscv-none-elf-ar crs bin/riscv32imc-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32i_zicsr_zifencei src/arch/riscv/asm.S -o bin/$crate.o
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riscv-none-elf-ar crs bin/riscv32i-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-gcc -ggdb3 -c -mabi=lp64 -march=rv64imac_zicsr_zifencei src/arch/riscv/asm.S -o bin/$crate.o
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riscv-none-elf-ar crs bin/riscv64imac-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-ar crs bin/riscv64gc-unknown-none-elf.a bin/$crate.o
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}
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"arm" {
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Remove-Item -Force bin/arm*.a
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arm-none-eabi-gcc -ggdb3 -c -march=armv7-a src/arch/arm/asm.S -o bin/$crate.o
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ar crs bin/armv7a-unknown-xous-elf.a bin/$crate.o
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}
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}
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Remove-Item bin/$crate.o
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