xous-core/kernel/Cargo.toml
2023-12-26 00:13:10 +08:00

67 lines
2.3 KiB
TOML

[package]
authors = ["Sean Cross <sean@xobs.io>"]
description = "Core kernel for Xous, including task switching and memory management"
license = "MIT OR Apache-2.0"
edition = "2018"
name = "xous-kernel"
version = "0.9.38"
resolver = "2"
# Dependency versions enforced by Cargo.lock.
[dependencies]
bitflags = "1.2.1"
stats_alloc = { version = "0.1.8", optional = true }
xous-kernel = { package = "xous", version = "0.9.56", features = [
"forget-memory-messages",
] }
utralib = { version = "0.1.23", optional = true, default_features = false }
rand_chacha = { version = "0.3.1", optional = true, default_features = false }
[target.'cfg(any(windows,unix))'.dev-dependencies]
xous-kernel = { package = "xous", version = "0.9.56", features = [
"forget-memory-messages",
"processes-as-threads",
] }
[target.'cfg(target_arch = "riscv32")'.dependencies]
riscv = { version = "0.5.6", package = "xous-riscv" } # source is in "../imports/riscv-0.5.6"
gdbstub = { version = "0.6.5", optional = true, default-features = false }
gdbstub_arch = { version = "0.2.4", optional = true, default-features = false }
[target.'cfg(target_arch = "arm")'.dependencies]
armv7 = { git = "https://github.com/Foundation-Devices/armv7.git", branch = "update", features = ["critical-section"] }
atsama5d27 = { git = "https://github.com/Foundation-Devices/atsama5d27.git", branch = "master" }
xous-kernel = { package = "xous", version = "0.9.56", features = [
"v2p",
] }
critical-section = "1.1.1"
[features]
cramium-soc = ["utralib/cramium-soc"]
cramium-fpga = ["utralib/cramium-fpga"]
atsama5d27 = ["utralib/atsama5d27"]
precursor = ["utralib/precursor"]
hosted = ["utralib/hosted"]
renode = ["utralib/renode"]
debug-print = []
gdb-stub = ["gdbstub", "gdbstub_arch"]
print-panics = []
report-memory = ["stats_alloc"]
wrap-print = []
big-heap = [] # Cause heaps to start at 12 MM instead of 512 kB
v2p = ["xous-kernel/v2p"]
# patches for simulation targets ONLY. Applying these flags will result in totally broken security.
hwsim = []
fake-rng = ["rand_chacha"] # works around lack of a real TRNG in the full-chip sim for now. This should go away for production.
# default = ["print-panics", "debug-print", "wrap-print"]
default = ["print-panics"]
[target.'cfg(any(windows, unix))'.dependencies]
crossbeam-channel = "0.5"
hex = "0.4"
lazy_static = "1.4"
rand = "0.8.5"
rand_chacha = "0.3.1"