mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-04 04:27:34 +00:00
The kernel stack offset should be aligned to 16 bytes. Previously it was aligned to 8 bytes. It's unclear if this was the cause of any issues, but it is best practice to keep things aligned to 16 bytes. As part of this, key the atomic instructions off of the CPP macro presence of atomic instructions. Signed-off-by: Sean Cross <sean@xobs.io>
62 lines
1.6 KiB
Bash
Executable file
62 lines
1.6 KiB
Bash
Executable file
#!/usr/bin/env bash
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# SPDX-FileCopyrightText: 2020 Sean Cross <sean@xobs.io>
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# SPDX-FileCopyrightText: 2023 Foundation Devices, Inc <hello@foundationdevices.com>
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# SPDX-License-Identifier: Apache-2.0
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set -euxo pipefail
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crate=xous-kernel
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usage() {
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echo "Usage: $0 [-a <riscv|arm>]"
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exit 1
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}
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while getopts "a:" o; do
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case "${o}" in
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a)
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arch=$OPTARG
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;;
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*)
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usage
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;;
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esac
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done
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arch=${arch:-riscv}
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mkdir -p bin
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case $arch in
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riscv)
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# Remove existing blobs because otherwise this will append object
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# files to the old blobs
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rm -f bin/riscv*.a
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riscv-none-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32imac_zicsr src/arch/riscv/asm.S -o bin/$crate.o
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ar crs bin/riscv32imac-unknown-none-elf.a bin/$crate.o
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ar crs bin/riscv32imac-unknown-xous-elf.a bin/$crate.o
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ar crs bin/riscv32imc-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32i_zicsr src/arch/riscv/asm.S -DSKIP_MULTICORE -o bin/$crate.o
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ar crs bin/riscv32i-unknown-none-elf.a bin/$crate.o
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riscv-none-elf-gcc -ggdb3 -c -mabi=lp64 -march=rv64imac_zicsr src/arch/riscv/asm.S -o bin/$crate.o
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ar crs bin/riscv64imac-unknown-none-elf.a bin/$crate.o
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ar crs bin/riscv64gc-unknown-none-elf.a bin/$crate.o
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;;
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arm)
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rm -f bin/arm*.a
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arm-none-eabi-gcc -ggdb3 -c -march=armv7-a src/arch/arm/asm.S -o bin/$crate.o
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ar crs bin/armv7a-unknown-xous-elf.a bin/$crate.o
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;;
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default)
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usage
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;;
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esac
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rm bin/$crate.o
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