bunnie 1effeab858 add legacy_int handler to the kernel, handle vexii init case ... The "main" product line is affected here in that the UART init is hosted above the trng init. This should have no impact on security or boot time, but allows us to more easily debug TRNG init issues. This is necessary because in the vexii test version the XADC interface is broken by the slower clocking and I'm not taking the time to trace down that issue as it does nothing to further the goal of testing the vex-ii core in a non-production config. legacy_int handler allows vex-ii to emulate/behave like the vex-i in terms of interrupt handling. eventually this will be replaced with/augmeted by a PLIC.		2025-07-21 17:11:23 +08:00
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font6x12_1bpp.raw	kernel: initial lcdpanic implementation	2023-04-10 14:42:59 +08:00
gdbuart.rs	update formatting on the published crates	2024-09-23 01:43:02 +08:00
lcdpanic.rs	ok, format the kernel now that all in-line assembly has been checked	2024-01-14 19:27:14 +08:00
mod.rs	add legacy_int handler to the kernel, handle vexii init case	2025-07-21 17:11:23 +08:00
rand.rs	raw pointer dance for kernel TRNG	2024-12-02 19:05:24 +08:00
uart.rs	handle case where uart is re-allocated by the kernel	2025-07-21 17:07:28 +08:00