mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-08 04:56:43 +00:00
When we started this project, all Renode Litex modules were 8-bits, and we had to custom-make a 32-bit timer module. However, in the interim, upstream has grown a 32-bit variant of this timer. As of this writing, this change was made two years ago. Remove our custom variant and use the upstream version instead. Signed-off-by: Sean Cross <sean@xobs.io>
57 lines
1.3 KiB
Text
57 lines
1.3 KiB
Text
cpu: CPU.VexRiscv @ sysbus
|
|
cpuType: "rv32i"
|
|
PerformanceInMips: 6
|
|
|
|
uart: UART.LiteX_UART @ {
|
|
sysbus 0xE0003800
|
|
}
|
|
-> cpu@1001
|
|
|
|
timer0: Timers.LiteX_Timer_CSR32 @ {
|
|
sysbus 0xe0001000
|
|
}
|
|
frequency: 100000000
|
|
-> cpu@1000
|
|
|
|
i2c: I2C.Betrusted.BetrustedEcI2C @ sysbus 0xE0004800
|
|
-> cpu @ 1002
|
|
|
|
ticktimer: Timers.Betrusted.TickTimer @ sysbus 0xe0005000
|
|
-> cpu @ 1003
|
|
|
|
com: SPI.Betrusted.BetrustedEcCom @ sysbus 0xe0005800
|
|
memAddr: 0xD0000000
|
|
memSize: 0x1000
|
|
|
|
wifi: SPI.Betrusted.EcWifi @ sysbus 0xe0006000
|
|
|
|
sram: Memory.MappedMemory @ {
|
|
sysbus 0x10000000;
|
|
sysbus 0x90000000 // shadow
|
|
}
|
|
size: 0x00020000
|
|
|
|
power: Miscellaneous.Betrusted.EcPower @ sysbus 0xE0002800
|
|
|
|
rom: Memory.MappedMemory @ {
|
|
sysbus 0x00000000;
|
|
sysbus 0x80000000 // shadow
|
|
}
|
|
size: 0x00002000
|
|
|
|
flash_mem: Memory.MappedMemory @ {
|
|
sysbus 0x20000000;
|
|
sysbus 0xA0000000 // shadow
|
|
}
|
|
size: 0x00200000
|
|
|
|
lm3509: Mocks.Betrusted.LM3509 @ i2c 0x36
|
|
tusb320lai: Mocks.Betrusted.TUSB320LAI @ i2c 0x47
|
|
bq27421: Sensors.Betrusted.BQ27421 @ i2c 0x55
|
|
bq24157: Mocks.Betrusted.BQ24157 @ i2c 0x6a
|
|
lsm6ds3: Mocks.Betrusted.LSM6DS3 @ i2c 0x6b
|
|
wf200: Network.Betrusted.WF200 @ wifi
|
|
|
|
sysbus:
|
|
init:
|
|
ApplySVD @ec/soc.svd
|