bunnie 97895fd9c9 fix cache coherence issue with FLASH ... after updating a piece of FLASH memory, there is an inherent cache coherence issue. This is because the write happens through a side channel that is outside of the memory model of the system: writes happen through a CSR that feed data to pages of FLASH. Reads happen through direct-mapped memory regions that are unaware of write mutations. Thus, after writing a page of memory, if you try to access it, sometimes you'll read the old cached value instead of the new updated value. This patch introduces a mandatory dcache flush after every FLASH write, so that any cached FLASH regions are re-fetched.		2022-10-07 18:50:51 +08:00
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src	fix cache coherence issue with FLASH	2022-10-07 18:50:51 +08:00
Cargo.toml	bump version numbers for xous-kernel patch	2022-10-05 23:51:35 +08:00