mirror of
https://github.com/saymrwulf/xous-core.git
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b31c7d411d
this is a big, ugly, multi-file commit but it turns out when you start shaking one part of the clock tree everything rattles along with it. Basically this updates the clock tree to use a search for an optimal setting instead of a hueristic/table lookup, and then a bunch of small bugs in the clock settings were found that had to be proopagated to dependent crates. i2c clock set now seems ... more correct, the frequency is not overclocking the bus (was at 600khz before, now just below 400khz) the uart equations finally sees sane the spi clocks check out the only inconsistency left is that i can't seem to get a fractional division on peri clk. it would be really nice to be able to do a fractional divide and get a little more peformance out of the spi busses but i think it just doesn't work that way - the "fractional" division is actually more of a "time-average frequency is correct" but when you go into fractional mode it's spending some time pulsing at 2x the rate and some time at 1x the rate to get to the time average frequency, and when you're at the 2x rate things break. |
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| .. | ||
| bao1x-api | ||
| bao1x-hal | ||
| blitstr2 | ||
| chat | ||
| cos_table | ||
| flatipc | ||
| flatipc-derive | ||
| keystore-api | ||
| mass-storage | ||
| perflib | ||
| precursor-hal | ||
| tls | ||
| userprefs | ||
| ux-api | ||
| xous-bio | ||
| xous-bio-bdma | ||
| xous-pio | ||
| xous-pl230 | ||