mirror of
https://github.com/saymrwulf/xous-core.git
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c44f117331
- fix tx_await() condition to consider both control and tx channels - make tx_async more efficient for the common case that the buffer fits in a single transaction by appending the CS de-assert as part of the initial command stream - make trait for the udma global clock setting The high bit in this exploration is that there seems to be no way to actually confirm when a UDMA transaction has fully completed on the hardware interface. All the completion signals tell you when the software-side UDMA resources are freed up. However, in this case, the hardware-side resources may still be transmitting/receiving data. This is a problem for the case of a '4-wire SPI' display where you need to set an extra line to control command/data mode addressing. In this case, the current work-around is to read back the state of the chip select pin as a GPIO to determine when the hardware has finished. I suspect that if we can figure out how to use UDMA in a full duplex mode that we could do something more essentially linked to the hardware, but this would also require having a dummy Rx buffer allocated that is the same depth as the hardware Tx buffer if all you cared about is the hardware conclusion of a Tx. |
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| .. | ||
| fonts | ||
| platform | ||
| args.rs | ||
| asm.rs | ||
| bootconfig.rs | ||
| consts.rs | ||
| debug.rs | ||
| font6x12.png | ||
| font6x12_1bpp.raw | ||
| fonts.rs | ||
| lib.rs | ||
| main.rs | ||
| minielf.rs | ||
| murmur3.rs | ||
| phase1.rs | ||
| phase2.rs | ||
| platform.rs | ||
| secboot.rs | ||
| swap.rs | ||
| test.rs | ||
