mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-06 04:46:20 +00:00
100 lines
2.6 KiB
Rust
100 lines
2.6 KiB
Rust
use core::fmt::{Error, Write};
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use utralib::generated::*;
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#[macro_use]
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#[cfg(all(not(test), any(feature = "debug-print", feature = "print-panics")))]
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pub mod debug_print_hardware {
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use crate::debug::*;
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pub const SUPERVISOR_UART: Uart = Uart {
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base: 0xffcf_0000 as *mut usize,
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};
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#[macro_export]
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macro_rules! print
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{
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($($args:tt)+) => ({
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use core::fmt::Write;
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let _ = write!(crate::debug::debug_print_hardware::SUPERVISOR_UART, $($args)+);
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});
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}
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}
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#[cfg(all(not(test), any(feature = "debug-print", feature = "print-panics")))]
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pub use crate::debug::debug_print_hardware::SUPERVISOR_UART;
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#[cfg(all(not(test), not(any(feature = "debug-print", feature = "print-panics"))))]
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#[macro_export]
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macro_rules! print {
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($($args:tt)+) => {{
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()
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}};
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}
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#[macro_export]
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macro_rules! println
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{
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() => ({
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print!("\r\n")
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});
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($fmt:expr) => ({
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print!(concat!($fmt, "\r\n"))
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});
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($fmt:expr, $($args:tt)+) => ({
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print!(concat!($fmt, "\r\n"), $($args)+)
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});
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}
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pub struct Uart {
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pub base: *mut usize,
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}
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impl Uart {
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#[allow(dead_code)]
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pub fn enable_rx(self) {
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let mut uart_csr = CSR::new(self.base as *mut u32);
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uart_csr.wfo(utra::uart::EV_ENABLE_ENABLE, uart_csr.rf(utra::uart::EV_ENABLE_ENABLE) | 2);
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}
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pub fn putc(&self, c: u8) {
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let mut uart_csr = CSR::new(self.base as *mut u32);
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// Wait until TXFULL is `0`
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while uart_csr.r(utra::uart::TXFULL) != 0 {
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()
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}
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uart_csr.wfo(utra::uart::RXTX_RXTX, c as u32);
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}
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#[allow(dead_code)]
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pub fn getc(&self) -> Option<u8> {
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let mut uart_csr = CSR::new(self.base as *mut u32);
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// If EV_PENDING_RX is 1, return the pending character.
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// Otherwise, return None.
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match uart_csr.r(utra::uart::EV_PENDING) & 2 {
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0 => None,
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ack => {
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let c = Some(uart_csr.r(utra::uart::RXTX) as u8);
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uart_csr.wo(utra::uart::EV_PENDING, ack);
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c
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}
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}
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}
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}
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#[cfg(all(not(test), any(feature = "debug-print", feature = "print-panics")))]
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pub fn irq(_irq_number: usize, _arg: *mut usize) {
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println!(
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"Interrupt {}: Key pressed: {}",
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_irq_number,
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SUPERVISOR_UART
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.getc()
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.expect("no character queued despite interrupt") as char
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);
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}
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impl Write for Uart {
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fn write_str(&mut self, s: &str) -> Result<(), Error> {
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for c in s.bytes() {
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self.putc(c);
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}
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Ok(())
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}
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}
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