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1255bf12d9
The code base had evolved through several code names, interim names, company names and chip names that alternatively did or did not exist. Baochip is the definitive name of the company, and the Baochip1x (full part number BAO1X2S4F-WA) is the definitivey part number of the SoC. For convenience, the part number is shortened to 'bao1x' in most feature flags and variable references. This commit fixes all of the odd names and removes some unmaintained early targets.
60 lines
1.9 KiB
TOML
60 lines
1.9 KiB
TOML
[package]
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name = "utralib"
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version = "0.1.25"
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authors = ["Sean Cross <sean@xobs.io>", "bunnie <bunnie@kosagi.com>"]
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edition = "2018"
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license = "MIT OR Apache-2.0"
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description = "Xous UTRA (Unambiguous Thin Register Abstration) library generator"
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repository = "https://github.com/betrusted-io/xous-core/"
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homepage = "https://betrusted.io/xous-book/"
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# Dependency versions enforced by Cargo.lock.
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[dependencies]
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[build-dependencies]
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svd2utra = "0.1.23"
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# UTRA pre-generated version tracker
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[features]
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std = []
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# This specifies the SVD rev for platform targets
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# Precursor is an FPGA, so the actual hardware register spec can change over time,
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# hence the gitrev is specified as part of the precursor feature spec. We specify
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# every gitrev that we may need to refer back to, so that we're not trying to
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# map utralib version numbers to precursor soc revs -- by having the gitrev exposed,
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# we can directly look up what generated the SVD file we're using without having
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# to go through some manually maintained lookup table of version # to gitrev.
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#
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# SoCs in custom silicon would typically not need the gitrev, since their
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# hardware is immutable.
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#
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# Maintainer note: add checks in build.rs to ensure only one is selected.
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precursor-perflib = []
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precursor-dvt = []
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precursor-pvt = [] # based on 2020.08 litex, v0.9.11 tag
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# The SVD gitrev as specified above is only invoked to track fine-grained
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# changes between target revisions. Below is the overall target switch,
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# which is the preferred mechanism for isolating target-specific code.
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#
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# These features are mutually exclusive. Maintainers should update the
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# checks inside build.rs to ensure consistency.
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precursor = []
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hosted = []
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renode = []
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# ATSAMA5D27 ARMv7A SoC
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atsama5d27 = []
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# Baochip-1x SoC & FPGA model
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bao1x = []
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# Emulation for bao1x
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hosted-baosec = []
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# Arty targets
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artybio = []
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artyvexii = []
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# Specify a Precusor default so that we can pass packaging CI tests.
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default = ["hosted"]
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