mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-08 04:56:43 +00:00
14572 lines
No EOL
672 KiB
XML
14572 lines
No EOL
672 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
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<vendor>cramium</vendor>
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<name>SOC</name>
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<description><![CDATA[Cramium SoC]]></description>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<peripherals>
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<peripheral>
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<name>PL230</name>
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<description>PL230 DMA Controller Core</description>
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<baseAddress>1073811456</baseAddress>
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<addressBlock>
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<offset>0x0</offset>
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<size>0x40</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x40</offset>
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<size>0xc</size>
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<usage>reserved</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x4c</offset>
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<size>0x4</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>STATUS</name>
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<description>DMA Status Register</description>
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<addressOffset>0x00</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x101f0000</resetValue>
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<resetMask>0xffffff0f</resetMask>
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<fields>
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<field>
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<name>TEST_STATUS</name>
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<description>Test status configuration</description>
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<bitOffset>28</bitOffset>
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<bitWidth>4</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>CHNLS_MINUS1</name>
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<description>Number of available DMA channels minus 1</description>
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<bitOffset>16</bitOffset>
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<bitWidth>5</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>STATE</name>
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<description>Current state of the control machine</description>
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<bitOffset>4</bitOffset>
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<bitWidth>4</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>MASTER_ENABLE</name>
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<description>Master enable status</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CFG</name>
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<description>DMA Configuration Register</description>
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<addressOffset>0x04</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_PROT_CTRL</name>
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<description>Set AHB-Lite configuration</description>
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<bitOffset>5</bitOffset>
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<bitWidth>3</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>MASTER_ENABLE</name>
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<description>MASTER_ENABLE</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CTRLBASEPTR</name>
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<description>DMA Control Data Base Pointer Register</description>
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<addressOffset>0x08</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CTRL_BASE_PTR</name>
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<description>CTRL_BASE_PTR</description>
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<bitOffset>8</bitOffset>
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<bitWidth>24</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>ALTCTRLBASEPTR</name>
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<description>DMA Channel Alternate Control Data Base Pointer Register</description>
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<addressOffset>0x0C</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>ALT_CTRL_BASE_PTR</name>
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<description>ALT_CTRL_BASE_PTR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>DMA_WAITONREQ_STATUS</name>
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<description>Channel wait on request status</description>
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<addressOffset>0x10</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>DMA_WAITONREQ_STATUS</name>
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<description>Wait on request status, one bit per channel</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLSWREQUEST</name>
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<description>DMA Channel Software Request Register</description>
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<addressOffset>0x14</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_SW_REQUEST</name>
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<description>CHNL_SW_REQUEST</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLUSEBURSTSET</name>
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<description>DMA Channel Useburst Set Register</description>
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<addressOffset>0x18</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CHNL_USEBURST_SET</name>
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<description>CHNL_USEBURST_SET</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLUSEBURSTCLR</name>
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<description>DMA Channel Useburst Clear Register</description>
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<addressOffset>0x1C</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_USEBURST_CLR</name>
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<description>CHNL_USEBURST_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLREQMASKSET</name>
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<description>DMA Channel Request Mask Set Register</description>
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<addressOffset>0x20</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CHNL_REQ_MASK_SET</name>
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<description>CHNL_REQ_MASK_SET</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLREQMASKCLR</name>
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<description>DMA Channel Request Mask Clear Register</description>
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<addressOffset>0x24</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_REQ_MASK_CLR</name>
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<description>CHNL_REQ_MASK_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLENABLESET</name>
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<description>DMA Channel Enable Set Register</description>
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<addressOffset>0x28</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CHNL_ENABLE_SET</name>
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<description>CHNL_ENABLE_SET</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLENABLECLR</name>
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<description>DMA Channel Enable Clear Register</description>
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<addressOffset>0x2C</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_ENABLE_CLR</name>
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<description>CHNL_ENABLE_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLPRIALTSET</name>
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<description>DMA Channel Primary-Alternate Set Register</description>
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<addressOffset>0x30</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CHNL_PRI_ALT_SET</name>
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<description>CHNL_PRI_ALT_SET</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLPRIALTCLR</name>
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<description>DMA Channel Primary-Alternate Clear Register</description>
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<addressOffset>0x34</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_PRI_ALT_CLR</name>
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<description>CHNL_PRI_ALT_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLPRIORITYSET</name>
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<description>DMA Channel Priority Set Register</description>
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<addressOffset>0x38</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>CHNL_PRIORITY_SET</name>
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<description>CHNL_PRIORITY_SET</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CHNLPRIORITYCLR</name>
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<description>DMA Channel Priority Clear Register</description>
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<addressOffset>0x3C</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<fields>
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<field>
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<name>CHNL_PRIORITY_CLR</name>
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<description>CHNL_PRIORITY_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>ERRCLR</name>
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<description>DMA Bus Error Clear Register</description>
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<addressOffset>0x4C</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>ERR_CLR</name>
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<description>ERR_CLR</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>PERIPH_ID_0</name>
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<description>Peripheral ID byte 0</description>
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<addressOffset>0xFE0</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>PART_NUMBER_LSB</name>
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<description>Identifies the part number</description>
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<bitOffset>0</bitOffset>
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<bitWidth>8</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>PERIPH_ID_1</name>
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<description>Peripheral ID byte 1</description>
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<addressOffset>0xFE4</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>PART_NUMBER_MSB</name>
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<description>Identifies the part number</description>
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<bitOffset>0</bitOffset>
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<bitWidth>4</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>JEP106_LSB</name>
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<description>Designer ID LSB</description>
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<bitOffset>4</bitOffset>
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<bitWidth>3</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>PERIPH_ID_2</name>
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<description>Peripheral ID byte 2</description>
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<addressOffset>0xFE8</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xffffffff</resetMask>
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<fields>
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<field>
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<name>JEP106_MSB</name>
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<description>Designer ID MSB</description>
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<bitOffset>0</bitOffset>
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<bitWidth>3</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>JEDEC_USED</name>
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<description>Identifies if JP106 ID code is used</description>
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<bitOffset>3</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-only</access>
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</field>
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<field>
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<name>REVISION</name>
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<description>Identifies revision number of peripheral</description>
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<bitOffset>4</bitOffset>
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<bitWidth>4</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral>
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<peripheral>
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<name>ALU</name>
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<baseAddress>0x4002F000</baseAddress>
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<groupName>ALU</groupName>
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<registers>
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<register>
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<name>SFR_CRFUNC</name>
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<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
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<addressOffset>0x0000</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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<field>
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<name>sfr_crfunc</name>
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<msb>7</msb>
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<bitRange>[7:0]</bitRange>
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<lsb>0</lsb>
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<description><![CDATA[sfr_crfunc read/write control register]]></description>
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</field>
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</fields>
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</register>
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<register>
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<name>SFR_AR</name>
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<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
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<addressOffset>0x0004</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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<field>
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<name>sfr_ar</name>
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<msb>31</msb>
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<bitRange>[31:0]</bitRange>
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<lsb>0</lsb>
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<description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
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</field>
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</fields>
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</register>
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<register>
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<name>SFR_SRMFSM</name>
|
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<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
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<addressOffset>0x0008</addressOffset>
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<resetValue>0x00</resetValue>
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<size>32</size>
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<fields>
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<field>
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<name>mfsm</name>
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<msb>7</msb>
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<bitRange>[7:0]</bitRange>
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<lsb>0</lsb>
|
|
<description><![CDATA[mfsm read only status register]]></description>
|
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</field>
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<field>
|
|
<name>crreg</name>
|
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<msb>8</msb>
|
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<bitRange>[8:8]</bitRange>
|
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<lsb>8</lsb>
|
|
<description><![CDATA[crreg read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm_done</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_done</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[div_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnlo_done</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[chnlo_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnli_done</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[chnli_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>qs0err</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[qs0err flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CRDIVLEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_crdivlen</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_crdivlen read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRDIVLEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_srdivlen</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_srdivlen read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_opt</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_opt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTLTX</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optltx</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optltx read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_CR_SEGCFG0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_segcfg0</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segcfg read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_CR_SEGCFG1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_segcfg1</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segcfg read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_CR_SEGCFG2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_segcfg2</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segcfg read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_CR_SEGCFG3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_segcfg3</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segcfg read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>AES</name>
|
|
<baseAddress>0x4002D000</baseAddress>
|
|
<groupName>AES</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CRFUNC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_crfunc</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_crfunc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRMFSM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_srmfsm</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_srmfsm read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm_done</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>acore_done</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[acore_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnlo_done</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[chnlo_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnli_done</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[chnli_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>opt_klen0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[opt_klen0 read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>opt_mode0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[opt_mode0 read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>opt_ifstart0</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[opt_ifstart0 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_opt1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_opt1 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTLTX</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optltx</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optltx read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_MASKSEED</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_maskseed</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_maskseed read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_MASKSEEDAR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_maskseedar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_maskseedar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_IV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_IV</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_AKEY</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_AKEY</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_AIB</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_AIB</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_AOB</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_AOB</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>COMBOHASH</name>
|
|
<baseAddress>0x4002B000</baseAddress>
|
|
<groupName>COMBOHASH</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CRFUNC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_func</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_func read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRMFSM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm_done</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>hash_done</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[hash_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnlo_done</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[chnlo_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnli_done</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[chnli_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chkdone</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[chkdone flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chkpass</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[chkpass flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_opt_hashcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_opt_hashcnt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_opt_scrtchk</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_opt.scrtchk read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cr_opt_ifsob</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[cr_opt.ifsob read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cr_opt_ifstart</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[cr_opt.ifstart read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>opt_schnr1_0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[opt_schnr[1:0] read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_opt3</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_opt3 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_BLKT0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_blkt0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_blkt0 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_LKEY</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_LKEY</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_KEY</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_KEY</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_SCRT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_SCRT</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_MSG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_MSG</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_HOUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_HOUT</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_SEGID_HOUT2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>SEGID_HOUT2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PKE</name>
|
|
<baseAddress>0x4002C000</baseAddress>
|
|
<groupName>PKE</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CRFUNC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_func</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_func read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cr_pcoreir</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[cr_pcoreir read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRMFSM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>modinvready</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[modinvready read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>mfsm_done</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[mfsm_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pcore_done</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[pcore_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnlo_done</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[chnlo_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnli_done</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[chnli_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
<field>
|
|
<name>chnlx_done</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[chnlx_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTNW</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optnw</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optnw read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTEW</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optew</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optew read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTRW</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optrw</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optrw read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTLTX</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optltx</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optltx read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPTMASK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_optmask</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_optmask read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_MIMMCR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_mimmcr</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_mimmcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_PCON</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_PCON</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_PIB0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_PIB0</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_PIB1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_PIB1</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_PKB</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_PKB</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEGPTR_PTRID_POB</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>PTRID_POB</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_segptrstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x44</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TRNG</name>
|
|
<baseAddress>0x4002E000</baseAddress>
|
|
<groupName>TRNG</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CRSRC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_crsrc</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_crsrc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CRANA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_crana</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_crana read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_PP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_pp</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_pp read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_opt</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_opt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_rng</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_rng read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AR_GEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ar_gen</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ar_gen performs action on write of value: 0x55]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_fr</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_fr flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DRPSZ</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_drpsz</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_drpsz read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DRGEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_drgen</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_drgen read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DRRESEED</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_drreseed</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_drreseed read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_BUF</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_buf</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_buf read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CHAIN_RNGCHAINEN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>rngchainen0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_chain read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CHAIN_RNGCHAINEN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>rngchainen1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_chain read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x48</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SCEDMA</name>
|
|
<baseAddress>0x40029000</baseAddress>
|
|
<groupName>SCEDMA</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_SCHSTART_AR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_schstart_ar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_schstart_ar performs action on write of value: 0xaa]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_FUNC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_xch_func</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_xch_func read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_xch_opt</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_xch_opt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_AXSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_xch_axstart</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_xch_axstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_SEGID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_xch_segid</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_xch_segid read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_SEGSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>xchcr_segstart</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[xchcr_segstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_XCH_TRANSIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>xchcr_transize</name>
|
|
<msb>29</msb>
|
|
<bitRange>[29:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[xchcr_transize read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_FUNC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sch_func</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sch_func read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sch_opt</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sch_opt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_AXSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sch_axstart</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sch_axstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_SEGID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sch_segid</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sch_segid read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_SEGSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>schcr_segstart</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[schcr_segstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SCH_TRANSIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>schcr_transize</name>
|
|
<msb>29</msb>
|
|
<bitRange>[29:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[schcr_transize read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICH_OPT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ich_opt</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ich_opt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICH_SEGID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ich_segid</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ich_segid read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICH_RPSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ichcr_rpstart</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ichcr_rpstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICH_WPSTART</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ichcr_wpstart</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ichcr_wpstart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICH_TRANSIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ichcr_transize</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ichcr_transize read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x64</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SCE_GLBSFR</name>
|
|
<baseAddress>0x40028000</baseAddress>
|
|
<groupName>SCE_GLBSFR</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_SCEMODE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_scemode</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_scemode read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SUBEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_suben</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_suben read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AHBS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_ahbsopt</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_ahbsopt read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRBUSY</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_busy</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_busy read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FRDONE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fr_done</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fr_done flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FRERR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fr_err</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fr_err flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ARCLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ar_clrram</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ar_clrram performs action on write of value: 0xa5]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TICKCYC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_tickcyc</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_tickcyc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TICKCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_tickcnt</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_tickcnt read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_ffen</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_ffen read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ar_ffclr</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ar_ffclr performs action on write of value: (32'hff00+i)]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FFCNT_SR_FF5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_ff5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_ff read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FRACERR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fr_acerr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fr_acerr flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
|
|
<addressOffset>0x00fc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_ts</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_ts read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x100</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>DUART</name>
|
|
<baseAddress>0x40042000</baseAddress>
|
|
<groupName>DUART</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_TXD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_txd</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_txd read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cr</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sr</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sr read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ETUC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_etuc</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_etuc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x10</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>RBIST_WRP</name>
|
|
<baseAddress>0x40045000</baseAddress>
|
|
<groupName>RBIST_WRP</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFRCR_TRM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/rbist/rtl/rbist_wrp.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfrcr_trm</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfrcr_trm read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFRAR_TRM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/rbist/rtl/rbist_wrp.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfrar_trm</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfrar_trm performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>WDG_INTF</name>
|
|
<baseAddress>0x40041000</baseAddress>
|
|
<groupName>WDG_INTF</groupName>
|
|
<registers>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER_INTF</name>
|
|
<baseAddress>0x40043000</baseAddress>
|
|
<groupName>TIMER_INTF</groupName>
|
|
<registers>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>EVC</name>
|
|
<baseAddress>0x40044000</baseAddress>
|
|
<groupName>EVC</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel2</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel3</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel4</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel5</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel6</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVSEL_CM7EVSEL7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evsel7</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7even</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7even read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7EVFR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cm7evs</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cm7evs flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TMREVSEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>tmr_evsel</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[tmr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_PWMEVSEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pwm_evsel</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pwm_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven6</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVEN_IFEVEN7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifeven7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifeven read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IFEVERRFR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>ifev_errs</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[ifev_errs flag register. `1` means event happened, write back `1` in respective
|
|
bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CM7ERRFR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
|
|
<addressOffset>0x0080</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>errin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[errin flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x84</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SYSCTRL</name>
|
|
<baseAddress>0x40040000</baseAddress>
|
|
<groupName>SYSCTRL</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CGUSEC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgusec</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgusec read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGULP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgulp</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgulp read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEED</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_seed</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_seed read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SEEDAR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_seedar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_seedar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgusel0</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgusel0 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFD_CFGFDCR_0_4_0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr_0_4_0</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFD_CFGFDCR_0_4_1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr_0_4_1</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFD_CFGFDCR_0_4_2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr_0_4_2</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFD_CFGFDCR_0_4_3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr_0_4_3</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFD_CFGFDCR_0_4_4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr_0_4_4</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFDAO</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgfdcr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgfdcr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUSET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cguset</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cguset performs action on write of value: 0x32]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgusel1</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgusel1 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFDPKE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgufdpke</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgufdpke read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSSR_FSFREQ0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fsfreq0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fsfreq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSSR_FSFREQ1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fsfreq1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fsfreq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSSR_FSFREQ2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fsfreq2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fsfreq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSSR_FSFREQ3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fsfreq3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fsfreq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSVLD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgufsvld</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgufsvld read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CGUFSCR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cgufscr</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cgufscr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ACLKGR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_aclkgr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_aclkgr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_HCLKGR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0064</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_hclkgr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_hclkgr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ICLKGR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0068</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_iclkgr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_iclkgr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_PCLKGR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x006c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_pclkgr</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_pclkgr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RCURST0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0080</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_rcurst0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_rcurst0 performs action on write of value: 0x55aa]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RCURST1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0084</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_rcurst1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_rcurst1 performs action on write of value: 0x55aa]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RCUSRCFR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0088</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_rcusrcfr</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_rcusrcfr flag register. `1` means event happened, write back `1` in
|
|
respective bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCARIPFLOW</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0090</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcaripflow</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcaripflow performs action on write of value: 0x57]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0094</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcen</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcen read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCLPEN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x0098</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipclpen</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipclpen read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCOSC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x009c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcosc</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcosc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCPLLMN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x00a0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcpllmn</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcpllmn read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCPLLF</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x00a4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcpllf</name>
|
|
<msb>24</msb>
|
|
<bitRange>[24:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcpllf read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCPLLQ</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x00a8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipcpllq</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipcpllq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IPCCR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
|
|
<addressOffset>0x00ac</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ipccr</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ipccr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xb0</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>APB_THRU</name>
|
|
<baseAddress>0x50122000</baseAddress>
|
|
<groupName>APB_THRU</groupName>
|
|
<registers>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BIO_BDMA</name>
|
|
<baseAddress>0x50124000</baseAddress>
|
|
<groupName>BIO_BDMA</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CTRL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>en</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[en read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>restart</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[restart read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>clkdiv_restart</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[clkdiv_restart read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFGINFO</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>constant0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[constant value of 8]]></description>
|
|
</field>
|
|
<field>
|
|
<name>constant1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[constant value of 4]]></description>
|
|
</field>
|
|
<field>
|
|
<name>constant2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[constant value of 4096]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CONFIG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>snap_output_to_which</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[snap_output_to_which read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>snap_output_to_quantum</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[snap_output_to_quantum read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>snap_input_to_which</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[snap_input_to_which read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>snap_input_to_quantum</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[snap_input_to_quantum read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>disable_filter_peri</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[disable_filter_peri read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>disable_filter_mem</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[disable_filter_mem read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FLEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pclk_regfifo_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[0] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[1] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[2] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[3] read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ELEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fifo_event_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fifo_event_level[0] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[fifo_event_level[1] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[fifo_event_level[2] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[fifo_event_level[3] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level4</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[fifo_event_level[4] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level5</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:20]</bitRange>
|
|
<lsb>20</lsb>
|
|
<description><![CDATA[fifo_event_level[5] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level6</name>
|
|
<msb>27</msb>
|
|
<bitRange>[27:24]</bitRange>
|
|
<lsb>24</lsb>
|
|
<description><![CDATA[fifo_event_level[6] read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_level7</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:28]</bitRange>
|
|
<lsb>28</lsb>
|
|
<description><![CDATA[fifo_event_level[7] read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ETYPE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fifo_event_lt_mask</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fifo_event_lt_mask read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_eq_mask</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[fifo_event_eq_mask read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>fifo_event_gt_mask</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[fifo_event_gt_mask read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_SET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_set</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_set read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_clr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_status</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_status read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EXTCLOCK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>use_extclk</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[use_extclk read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>extclk_gpio_0</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[extclk_gpio_0 read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>extclk_gpio_1</name>
|
|
<msb>13</msb>
|
|
<bitRange>[13:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[extclk_gpio_1 read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>extclk_gpio_2</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:14]</bitRange>
|
|
<lsb>14</lsb>
|
|
<description><![CDATA[extclk_gpio_2 read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>extclk_gpio_3</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:19]</bitRange>
|
|
<lsb>19</lsb>
|
|
<description><![CDATA[extclk_gpio_3 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FIFO_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_fifo_clr</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_fifo_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_QDIV0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>unused_div</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[unused_div read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_frac</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[div_frac read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_int</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[div_int read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_QDIV1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>unused_div</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[unused_div read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_frac</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[div_frac read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_int</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[div_int read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_QDIV2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>unused_div</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[unused_div read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_frac</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[div_frac read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_int</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[div_int read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_QDIV3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>unused_div</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[unused_div read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_frac</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[div_frac read/write control register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>div_int</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[div_int read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SYNC_BYPASS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sync_bypass</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sync_bypass read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IO_OE_INV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0064</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_io_oe_inv</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_io_oe_inv read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IO_O_INV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0068</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_io_o_inv</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_io_o_inv read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IO_I_INV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x006c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_io_i_inv</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_io_i_inv read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IRQMASK_0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0070</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_irqmask_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_irqmask_0 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IRQMASK_1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0074</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_irqmask_1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_irqmask_1 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IRQMASK_2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0078</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_irqmask_2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_irqmask_2 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IRQMASK_3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x007c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_irqmask_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_irqmask_3 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IRQ_EDGE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0080</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_irq_edge</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_irq_edge read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG_PADOUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0084</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_dbg_padout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_dbg_padout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG_PADOE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0088</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_dbg_padoe</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_dbg_padoe read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0090</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>dbg_pc</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[dbg_pc read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>trap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[trap read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0094</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>dbg_pc</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[dbg_pc read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>trap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[trap read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0098</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>dbg_pc</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[dbg_pc read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>trap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[trap read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DBG3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x009c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>dbg_pc</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[dbg_pc read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>trap</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[trap read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_MEM_GUTTER</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00a0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_mem_gutter</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_mem_gutter read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_PERI_GUTTER</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00a4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_peri_gutter</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_peri_gutter read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00b0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00b4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00b8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00bc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00c0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_MAP_CR_EVMAP5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00c4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evmap5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evmap read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00c8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00cc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00d0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00d4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00d8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DMAREQ_STAT_SR_EVSTAT5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00dc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_evstat5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_evstat read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BASE_0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00e0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_base</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_base read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BOUNDS_0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00e4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_bounds</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_bounds read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BASE_1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00e8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_base</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_base read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BOUNDS_1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00ec</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_bounds</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_bounds read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BASE_2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00f0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_base</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_base read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BOUNDS_2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00f4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_bounds</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_bounds read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BASE_3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00f8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_base</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_base read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_FILTER_BOUNDS_3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x00fc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>filter_bounds</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[filter_bounds read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x100</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>IOX</name>
|
|
<baseAddress>0x5012F000</baseAddress>
|
|
<groupName>IOX</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel6</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel7</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL8</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel8</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL9</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel9</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL10</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel10</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AFSEL_CRAFSEL11</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crafsel11</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crafsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0100</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint0</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0104</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint1</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0108</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint2</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x010c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint3</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0110</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint4</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0114</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint5</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0118</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint6</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTCR_CRINT7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x011c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crint7</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crint read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_INTFR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0120</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>frint</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[frint flag register. `1` means event happened, write back `1` in respective bit
|
|
position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0130</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0134</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0138</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x013c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0140</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOUT_CRGO5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0144</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgo5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgo read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0148</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x014c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0150</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0154</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0158</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOOE_CRGOE5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x015c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgoe5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgoe read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0160</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0164</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0168</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x016c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0170</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOPU_CRGPU5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0174</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>crgpu5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[crgpu read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0178</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x017c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0180</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0184</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0188</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GPIOIN_SRGI5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x018c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srgi5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srgi read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_PIOSEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0200</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>piosel</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[piosel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0230</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0234</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0238</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x023c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0240</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SCHM_CR_CFG_SCHMSEL5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0244</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_schmsel5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_schmsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0248</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x024c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0250</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0254</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0258</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow4</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x025c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_slewslow5</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_slewslow read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0260</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0264</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0268</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x026c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0270</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel4</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
|
|
<addressOffset>0x0274</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_cfg_drvsel5</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_cfg_drvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x278</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PWM</name>
|
|
<baseAddress>0x50120000</baseAddress>
|
|
<groupName>PWM</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_TIM0_CMD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_start]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_stop</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_timer0_stop]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_update</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[r_timer0_update]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_rst</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_timer0_rst]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_arm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_timer0_arm]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_in_sel</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_in_sel]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_in_mode</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_timer0_in_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_in_clk</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[r_timer0_in_clk]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_saw</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[r_timer0_saw]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_presc</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_presc]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH0_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch0_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch0_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch0_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch0_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH1_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch1_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch1_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch1_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch1_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH2_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch2_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch2_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch2_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch2_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH3_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch3_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch3_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch3_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch3_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH0_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch0_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch0_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch0_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch0_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH1_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch1_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch1_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch1_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch1_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH2_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch2_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch2_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch2_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch2_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM0_CH3_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer0_ch3_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer0_ch3_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer0_ch3_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer0_ch3_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CMD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_start]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_stop</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_timer1_stop]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_update</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[r_timer1_update]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_rst</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_timer1_rst]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_arm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_timer1_arm]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_in_sel</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_in_sel]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_in_mode</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_timer1_in_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_in_clk</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[r_timer1_in_clk]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_saw</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[r_timer1_saw]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_presc</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_presc]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH0_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch0_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch0_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch0_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch0_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH1_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch1_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch1_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch1_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch1_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH2_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch2_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch2_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch2_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch2_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH3_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch3_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch3_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch3_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch3_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH0_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch0_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch0_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch0_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch0_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH1_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch1_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch1_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch1_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch1_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH2_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0064</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch2_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch2_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch2_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch2_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM1_CH3_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0068</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer1_ch3_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer1_ch3_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer1_ch3_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer1_ch3_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CMD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0080</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_start]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_stop</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_timer2_stop]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_update</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[r_timer2_update]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_rst</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_timer2_rst]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_arm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_timer2_arm]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0084</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_in_sel</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_in_sel]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_in_mode</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_timer2_in_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_in_clk</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[r_timer2_in_clk]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_saw</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[r_timer2_saw]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_presc</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_presc]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH0_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x008c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch0_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch0_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch0_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch0_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH1_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0090</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch1_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch1_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch1_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch1_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH2_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0094</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch2_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch2_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch2_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch2_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH3_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0098</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch3_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch3_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch3_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch3_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH0_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x009c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch0_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch0_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch0_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch0_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH1_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00a0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch1_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch1_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch1_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch1_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH2_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00a4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch2_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch2_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch2_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch2_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM2_CH3_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00a8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer2_ch3_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer2_ch3_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer2_ch3_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer2_ch3_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CMD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00c0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_start]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_stop</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_timer3_stop]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_update</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[r_timer3_update]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_rst</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_timer3_rst]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_arm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_timer3_arm]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00c4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_in_sel</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_in_sel]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_in_mode</name>
|
|
<msb>10</msb>
|
|
<bitRange>[10:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_timer3_in_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_in_clk</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:11]</bitRange>
|
|
<lsb>11</lsb>
|
|
<description><![CDATA[r_timer3_in_clk]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_saw</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[r_timer3_saw]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_presc</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_presc]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH0_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00cc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch0_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch0_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch0_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch0_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH1_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00d0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch1_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch1_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch1_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch1_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH2_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00d4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch2_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch2_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch2_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch2_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH3_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00d8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch3_th</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch3_th]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch3_mode</name>
|
|
<msb>18</msb>
|
|
<bitRange>[18:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch3_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH0_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00dc</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch0_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch0_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch0_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch0_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH1_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00e0</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch1_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch1_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch1_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch1_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH2_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00e4</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch2_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch2_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch2_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch2_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TIM3_CH3_LUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x00e8</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_timer3_ch3_lut</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_timer3_ch3_lut]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_timer3_ch3_flt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_timer3_ch3_flt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_EVENT_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0100</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_event_sel_0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_event_sel_0]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_event_sel_1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_event_sel_1]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_event_sel_2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_event_sel_2]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_event_sel_3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[r_event_sel_3]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_event_en</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_event_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CH_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0104</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_clk_en</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_clk_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_PREFD0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0140</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>lsclk_prefd_0</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[lsclk_prefd_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_PREFD1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0144</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>lsclk_prefd_1</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[lsclk_prefd_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_PREFD2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x0148</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>lsclk_prefd_2</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[lsclk_prefd_2]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_PREFD3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/apb/apb_adv_timer/rtl/adv_timer_apb_if.sv]]></description>
|
|
<addressOffset>0x014c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>lsclk_prefd_3</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[lsclk_prefd_3]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x150</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>CORESUB_SRAMTRM</name>
|
|
<baseAddress>0x40014000</baseAddress>
|
|
<groupName>CORESUB_SRAMTRM</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_CACHE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_cache</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_cache read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ITCM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_itcm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_itcm read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DTCM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_dtcm</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_dtcm read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRAM0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sram0</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sram0 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRAM1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_sram1</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_sram1 read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_VEXRAM</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_vexram</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_vexram read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SRAMERR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>srambankerr</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[srambankerr flag register. `1` means event happened, write back `1` in
|
|
respective bit position to clear the flag]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x24</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>MDMA</name>
|
|
<baseAddress>0x40012000</baseAddress>
|
|
<groupName>MDMA</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel2</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel3</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel4</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel5</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel6</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVSEL_CR_EVSEL7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_evsel7</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_evsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq0</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq1</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq2</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq3</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq4</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq5</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq6</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_CR_CR_MDMAREQ7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_mdmareq7</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_mdmareq read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq0</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq1</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq2</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq3</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ4</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq4</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ5</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq5</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ6</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq6</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_SR_SR_MDMAREQ7</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
|
|
<addressOffset>0x005c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_mdmareq7</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_mdmareq read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x60</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>QFC</name>
|
|
<baseAddress>0x40010000</baseAddress>
|
|
<groupName>QFC</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_IO</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_io</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_io read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_AR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_ar</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_IODRV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>paddrvsel</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[paddrvsel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_ADDRMODE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_addrmode</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_addrmode read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_OPCODE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_opcode</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_opcode read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_WIDTH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_width</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_width read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_SSEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_ssel</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_ssel read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_DUMCYC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_dumcyc</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_dumcyc read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_XIP_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_xip_cfg</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_xip_cfg read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_AESKEY_AESKEYIN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>aeskeyin0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_aeskey read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_AESKEY_AESKEYIN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>aeskeyin1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_aeskey read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_AESKEY_AESKEYIN2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>aeskeyin2</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_aeskey read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_AESKEY_AESKEYIN3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>aeskeyin3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_aeskey read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR_AESENA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_aesena</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_aesena read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x54</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>MBOX_APB</name>
|
|
<baseAddress>0x40013000</baseAddress>
|
|
<groupName>MBOX_APB</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_WDATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_wdata</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_wdata read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RDATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_rdata</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_rdata read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>rx_avail</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[rx_avail read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>tx_free</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[tx_free read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>abort_in_progress</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[abort_in_progress read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>abort_ack</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[abort_ack read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>tx_err</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[tx_err read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>rx_err</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[rx_err read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_ABORT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_abort</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_abort performs action on write of value: 0x1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_DONE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_done</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_done performs action on write of value: 0x1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x20</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>GLUECHAIN</name>
|
|
<baseAddress>0x40054000</baseAddress>
|
|
<groupName>GLUECHAIN</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_GCMASK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_gcmask</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_gcmask read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GCSR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>gluereg</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[gluereg read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GCRST</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>gluerst</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[gluerst read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_GCTEST</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>gluetest</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[gluetest read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x10</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_CTRL</name>
|
|
<baseAddress>0x50100000</baseAddress>
|
|
<groupName>UDMA_CTRL</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_CG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_core/rtl/common/udma_ctrl.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cg</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cg]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CFG_EVT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_core/rtl/common/udma_ctrl.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmp_evt_0</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmp_evt_0]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmp_evt_1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_cmp_evt_1]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmp_evt_2</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_cmp_evt_2]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmp_evt_3</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:24]</bitRange>
|
|
<lsb>24</lsb>
|
|
<description><![CDATA[r_cmp_evt_3]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RST</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_core/rtl/common/udma_ctrl.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rst</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rst]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0xc</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_UART_0</name>
|
|
<baseAddress>0x50101000</baseAddress>
|
|
<groupName>UDMA_UART_0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_UART_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_parity_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_parity_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_bits</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_stop_bits</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_uart_stop_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_polling_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_uart_rx_polling_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_clean_fifo</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_uart_rx_clean_fifo]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_tx</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_uart_en_tx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_rx</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[r_uart_en_rx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_div</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_uart_div]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ERROR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_err_overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_err_overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err_parity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err_parity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_irq_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_err_irq_en</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_err_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_VALID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data_valid</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_UART_1</name>
|
|
<baseAddress>0x50102000</baseAddress>
|
|
<groupName>UDMA_UART_1</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_UART_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_parity_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_parity_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_bits</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_stop_bits</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_uart_stop_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_polling_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_uart_rx_polling_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_clean_fifo</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_uart_rx_clean_fifo]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_tx</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_uart_en_tx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_rx</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[r_uart_en_rx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_div</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_uart_div]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ERROR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_err_overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_err_overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err_parity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err_parity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_irq_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_err_irq_en</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_err_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_VALID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data_valid</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_UART_2</name>
|
|
<baseAddress>0x50103000</baseAddress>
|
|
<groupName>UDMA_UART_2</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_UART_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_parity_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_parity_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_bits</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_stop_bits</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_uart_stop_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_polling_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_uart_rx_polling_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_clean_fifo</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_uart_rx_clean_fifo]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_tx</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_uart_en_tx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_rx</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[r_uart_en_rx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_div</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_uart_div]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ERROR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_err_overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_err_overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err_parity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err_parity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_irq_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_err_irq_en</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_err_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_VALID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data_valid</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_UART_3</name>
|
|
<baseAddress>0x50104000</baseAddress>
|
|
<groupName>UDMA_UART_3</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_UART_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_parity_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_parity_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_bits</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_stop_bits</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_uart_stop_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_polling_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_uart_rx_polling_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_rx_clean_fifo</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_uart_rx_clean_fifo]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_tx</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_uart_en_tx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_en_rx</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[r_uart_en_rx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_div</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_uart_div]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ERROR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_err_overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_err_overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err_parity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err_parity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_irq_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_uart_err_irq_en</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_uart_err_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_VALID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data_valid</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_uart/rtl/udma_uart_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_uart_rx_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_uart_rx_data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIM_0</name>
|
|
<baseAddress>0x50105000</baseAddress>
|
|
<groupName>UDMA_SPIM_0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_backpressure</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[r_rx_backpressure]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_tx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x34</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIM_1</name>
|
|
<baseAddress>0x50106000</baseAddress>
|
|
<groupName>UDMA_SPIM_1</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_backpressure</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[r_rx_backpressure]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_tx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x34</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIM_2</name>
|
|
<baseAddress>0x50107000</baseAddress>
|
|
<groupName>UDMA_SPIM_2</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_backpressure</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[r_rx_backpressure]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_tx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x34</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIM_3</name>
|
|
<baseAddress>0x50108000</baseAddress>
|
|
<groupName>UDMA_SPIM_3</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_backpressure</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:7]</bitRange>
|
|
<lsb>7</lsb>
|
|
<description><![CDATA[r_rx_backpressure]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_tx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_qspi/rtl/udma_spim_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x34</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_I2C_0</name>
|
|
<baseAddress>0x50109000</baseAddress>
|
|
<groupName>UDMA_I2C_0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_busy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_busy]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_al</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_al]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_do_rst</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_do_rst]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ACK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_nack</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_nack]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x3c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_I2C_1</name>
|
|
<baseAddress>0x5010A000</baseAddress>
|
|
<groupName>UDMA_I2C_1</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_busy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_busy]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_al</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_al]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_do_rst</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_do_rst]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ACK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_nack</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_nack]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x3c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_I2C_2</name>
|
|
<baseAddress>0x5010B000</baseAddress>
|
|
<groupName>UDMA_I2C_2</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_busy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_busy]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_al</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_al]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_do_rst</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_do_rst]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ACK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_nack</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_nack]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x3c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_I2C_3</name>
|
|
<baseAddress>0x5010C000</baseAddress>
|
|
<groupName>UDMA_I2C_3</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_cmd_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_cmd_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_busy</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_busy]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_al</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_al]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_do_rst</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_do_rst]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ACK</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2c/rtl/udma_i2c_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_nack</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_nack]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x3c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SDIO</name>
|
|
<baseAddress>0x5010D000</baseAddress>
|
|
<groupName>UDMA_SDIO</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CMD_OP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cmd_rsp_type</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cmd_rsp_type]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_op</name>
|
|
<msb>13</msb>
|
|
<bitRange>[13:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_cmd_op]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cmd_stopopt</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_cmd_stopopt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_data_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_data_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_data_rwn</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_data_rwn]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_data_quad</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:2]</bitRange>
|
|
<lsb>2</lsb>
|
|
<description><![CDATA[r_data_quad]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_data_block_num</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_data_block_num]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_data_block_size</name>
|
|
<msb>25</msb>
|
|
<bitRange>[25:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_data_block_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_START</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_sdio_start</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_sdio_start]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RSP0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfg_rsp_data_i_31_0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfg_rsp_data_i_31_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RSP1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfg_rsp_data_i_63_32</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfg_rsp_data_i_63_32]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RSP2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfg_rsp_data_i_95_64</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfg_rsp_data_i_95_64]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RSP3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfg_rsp_data_i_127_96</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfg_rsp_data_i_127_96]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CLK_DIV</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_clk_div_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_clk_div_data]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_clk_div_valid</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_clk_div_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_eot</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_eot]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA_TIMEOUT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_sdio/rtl/udma_sdio_reg_if.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_data_timeout</name>
|
|
<msb>19</msb>
|
|
<bitRange>[19:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_data_timeout]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_I2S</name>
|
|
<baseAddress>0x5010E000</baseAddress>
|
|
<groupName>UDMA_I2S</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_tx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_I2S_CLKCFG_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_master_gen_clk_div</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_master_gen_clk_div]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_gen_clk_div</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_slave_gen_clk_div]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_common_gen_clk_div</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_common_gen_clk_div]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_clk_en</name>
|
|
<msb>24</msb>
|
|
<bitRange>[24:24]</bitRange>
|
|
<lsb>24</lsb>
|
|
<description><![CDATA[r_slave_clk_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_clk_en</name>
|
|
<msb>25</msb>
|
|
<bitRange>[25:25]</bitRange>
|
|
<lsb>25</lsb>
|
|
<description><![CDATA[r_master_clk_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_pdm_clk_en</name>
|
|
<msb>26</msb>
|
|
<bitRange>[26:26]</bitRange>
|
|
<lsb>26</lsb>
|
|
<description><![CDATA[r_pdm_clk_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_sel_ext</name>
|
|
<msb>28</msb>
|
|
<bitRange>[28:28]</bitRange>
|
|
<lsb>28</lsb>
|
|
<description><![CDATA[r_slave_sel_ext]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_sel_num</name>
|
|
<msb>29</msb>
|
|
<bitRange>[29:29]</bitRange>
|
|
<lsb>29</lsb>
|
|
<description><![CDATA[r_slave_sel_num]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_sel_ext</name>
|
|
<msb>30</msb>
|
|
<bitRange>[30:30]</bitRange>
|
|
<lsb>30</lsb>
|
|
<description><![CDATA[r_master_sel_ext]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_sel_num</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[r_master_sel_num]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_I2S_SLV_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_slave_i2s_words</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_slave_i2s_words]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_i2s_bits_word</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_slave_i2s_bits_word]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_i2s_lsb_first</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_slave_i2s_lsb_first]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_i2s_2ch</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:17]</bitRange>
|
|
<lsb>17</lsb>
|
|
<description><![CDATA[r_slave_i2s_2ch]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_i2s_en</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[r_slave_i2s_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_I2S_MST_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_master_i2s_words</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_master_i2s_words]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_i2s_bits_word</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_master_i2s_bits_word]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_i2s_lsb_first</name>
|
|
<msb>16</msb>
|
|
<bitRange>[16:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_master_i2s_lsb_first]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_i2s_2ch</name>
|
|
<msb>17</msb>
|
|
<bitRange>[17:17]</bitRange>
|
|
<lsb>17</lsb>
|
|
<description><![CDATA[r_master_i2s_2ch]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_master_i2s_en</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[r_master_i2s_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_I2S_PDM_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_i2s/rtl/udma_i2s_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_slave_pdm_shift</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_slave_pdm_shift]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_pdm_decimation</name>
|
|
<msb>12</msb>
|
|
<bitRange>[12:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_slave_pdm_decimation]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_pdm_mode</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:13]</bitRange>
|
|
<lsb>13</lsb>
|
|
<description><![CDATA[r_slave_pdm_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_slave_pdm_en</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[r_slave_pdm_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x30</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_CAMERA</name>
|
|
<baseAddress>0x5010F000</baseAddress>
|
|
<groupName>UDMA_CAMERA</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_datasize</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_CFG_GLOB</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_cfg</name>
|
|
<msb>29</msb>
|
|
<bitRange>[29:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_cfg]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cfg_cam_ip_en_i</name>
|
|
<msb>30</msb>
|
|
<bitRange>[30:30]</bitRange>
|
|
<lsb>30</lsb>
|
|
<description><![CDATA[cfg_cam_ip_en_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_CFG_LL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_cfg_ll</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_cfg_ll]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_CFG_UR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_cfg_ur</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_cfg_ur]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_CFG_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_cfg_size</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_cfg_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_CFG_FILTER</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_cfg_filter</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_cfg_filter]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CAM_VSYNC_POLARITY</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_camera/rtl/camera_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_cam_vsync_polarity</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_cam_vsync_polarity]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_cam_hsync_polarity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_cam_hsync_polarity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_FILTER</name>
|
|
<baseAddress>0x50110000</baseAddress>
|
|
<groupName>UDMA_FILTER</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_TX_CH0_ADD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_start_addr_0</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_start_addr_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH0_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_datasize_0</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_datasize_0]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_filter_tx_mode_0</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_filter_tx_mode_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH0_LEN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len0_0</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len0_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH0_LEN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len1_0</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len1_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH0_LEN2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len2_0</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len2_0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH1_ADD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_start_addr_1</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_start_addr_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH1_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_datasize_1</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_datasize_1]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_filter_tx_mode_1</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_filter_tx_mode_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH1_LEN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len0_1</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len0_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH1_LEN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len1_1</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len1_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CH1_LEN2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_tx_len2_1</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_tx_len2_1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CH_ADD</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_rx_start_addr</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_rx_start_addr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CH_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_rx_datasize</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_rx_datasize]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_filter_rx_mode</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_filter_rx_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CH_LEN0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_rx_len0</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_rx_len0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CH_LEN1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_rx_len1</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_rx_len1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CH_LEN2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_rx_len2</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_rx_len2]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_AU_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_au_use_signed</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_au_use_signed]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_au_bypass</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_au_bypass]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_au_mode</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_au_mode]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_au_shift</name>
|
|
<msb>20</msb>
|
|
<bitRange>[20:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_au_shift]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_AU_REG0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_commit_au_reg0</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_commit_au_reg0]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_AU_REG1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0044</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_commit_au_reg1</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_commit_au_reg1]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_BINCU_TH</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0048</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_commit_bincu_threshold</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_commit_bincu_threshold]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_BINCU_CNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x004c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_bincu_counter</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_bincu_counter]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_bincu_en_counter</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:31]</bitRange>
|
|
<lsb>31</lsb>
|
|
<description><![CDATA[r_bincu_en_counter]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_BINCU_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0050</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_bincu_datasize</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_bincu_datasize]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_BINCU_VAL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0054</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>bincu_counter_i</name>
|
|
<msb>14</msb>
|
|
<bitRange>[14:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[bincu_counter_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_FILT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0058</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_mode</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_mode]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/ips/udma/udma_filter/rtl/udma_filter_reg_if.sv]]></description>
|
|
<addressOffset>0x0060</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_filter_done</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_filter_done]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x64</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SCIF</name>
|
|
<baseAddress>0x50111000</baseAddress>
|
|
<groupName>UDMA_SCIF</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>status_i</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[status_i]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SCIF_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_scif_parity_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_scif_parity_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_bits</name>
|
|
<msb>2</msb>
|
|
<bitRange>[2:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_scif_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_stop_bits</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:3]</bitRange>
|
|
<lsb>3</lsb>
|
|
<description><![CDATA[r_scif_stop_bits]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_rx_polling_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_scif_rx_polling_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_rx_clean_fifo</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_scif_rx_clean_fifo]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_en_tx</name>
|
|
<msb>8</msb>
|
|
<bitRange>[8:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[r_scif_en_tx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_en_rx</name>
|
|
<msb>9</msb>
|
|
<bitRange>[9:9]</bitRange>
|
|
<lsb>9</lsb>
|
|
<description><![CDATA[r_scif_en_rx]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_clksel</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:14]</bitRange>
|
|
<lsb>14</lsb>
|
|
<description><![CDATA[r_scif_clksel]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_div</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:16]</bitRange>
|
|
<lsb>16</lsb>
|
|
<description><![CDATA[r_scif_div]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_ERROR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_err_overflow</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_err_overflow]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_err_parity</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_err_parity]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_scif_rx_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_scif_rx_irq_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_scif_err_irq_en</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[r_scif_err_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_VALID</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_scif_rx_data_valid</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_scif_rx_data_valid]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_DATA</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_scif_rx_data</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_scif_rx_data]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SCIF_ETU</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_scif_reg.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_scif_etu</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_scif_etu]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x3c</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIS_0</name>
|
|
<baseAddress>0x50112000</baseAddress>
|
|
<groupName>UDMA_SPIS_0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgcpol</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgcpol]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cfgcpha</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[cfgcpha]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SEOT_CNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_seot_cnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_seot_cnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>seot_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[seot_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_RXCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgrxcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgrxcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_TXCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgtxcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgtxcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_DMCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgdmcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgdmcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_SPIS_1</name>
|
|
<baseAddress>0x50113000</baseAddress>
|
|
<groupName>UDMA_SPIS_1</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_TX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_tx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_tx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_tx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_tx_clr</name>
|
|
<msb>6</msb>
|
|
<bitRange>[6:6]</bitRange>
|
|
<lsb>6</lsb>
|
|
<description><![CDATA[r_tx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_SETUP</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgcpol</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgcpol]]></description>
|
|
</field>
|
|
<field>
|
|
<name>cfgcpha</name>
|
|
<msb>1</msb>
|
|
<bitRange>[1:1]</bitRange>
|
|
<lsb>1</lsb>
|
|
<description><![CDATA[cfgcpha]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SEOT_CNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sr_seot_cnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sr_seot_cnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_IRQ_EN</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>seot_irq_en</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[seot_irq_en]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_RXCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgrxcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgrxcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_TXCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0030</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgtxcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgtxcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_SPIS_DMCNT</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_spis_reg.sv]]></description>
|
|
<addressOffset>0x0034</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cfgdmcnt</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cfgdmcnt]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x38</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UDMA_ADC</name>
|
|
<baseAddress>0x50114000</baseAddress>
|
|
<groupName>UDMA_ADC</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>REG_RX_SADDR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_adc_ts_reg_if.sv]]></description>
|
|
<addressOffset>0x0000</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_startaddr</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_startaddr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_SIZE</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_adc_ts_reg_if.sv]]></description>
|
|
<addressOffset>0x0004</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_size</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_size]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_RX_CFG</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_adc_ts_reg_if.sv]]></description>
|
|
<addressOffset>0x0008</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>r_rx_continuous</name>
|
|
<msb>0</msb>
|
|
<bitRange>[0:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[r_rx_continuous]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_en</name>
|
|
<msb>4</msb>
|
|
<bitRange>[4:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[r_rx_en]]></description>
|
|
</field>
|
|
<field>
|
|
<name>r_rx_clr</name>
|
|
<msb>5</msb>
|
|
<bitRange>[5:5]</bitRange>
|
|
<lsb>5</lsb>
|
|
<description><![CDATA[r_rx_clr]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG_CR_ADC</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/udma_adc_ts_reg_if.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>cr_adc</name>
|
|
<msb>27</msb>
|
|
<bitRange>[27:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[cr_adc]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x14</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BIO_FIFO0</name>
|
|
<baseAddress>0x50129000</baseAddress>
|
|
<groupName>BIO_FIFO0</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_FLEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pclk_regfifo_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[0] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[1] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[2] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[3] read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0010</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF0</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0020</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_SET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_set</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_set read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_clr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_status</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_status read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x44</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BIO_FIFO1</name>
|
|
<baseAddress>0x5012A000</baseAddress>
|
|
<groupName>BIO_FIFO1</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_FLEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pclk_regfifo_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[0] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[1] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[2] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[3] read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0014</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF1</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0024</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_SET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_set</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_set read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_clr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_status</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_status read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x44</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BIO_FIFO2</name>
|
|
<baseAddress>0x5012B000</baseAddress>
|
|
<groupName>BIO_FIFO2</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_FLEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pclk_regfifo_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[0] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[1] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[2] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[3] read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0018</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF2</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0028</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_SET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_set</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_set read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_clr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_status</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_status read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x44</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BIO_FIFO3</name>
|
|
<baseAddress>0x5012C000</baseAddress>
|
|
<groupName>BIO_FIFO3</groupName>
|
|
<registers>
|
|
<register>
|
|
<name>SFR_FLEVEL</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x000c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>pclk_regfifo_level0</name>
|
|
<msb>3</msb>
|
|
<bitRange>[3:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[0] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level1</name>
|
|
<msb>7</msb>
|
|
<bitRange>[7:4]</bitRange>
|
|
<lsb>4</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[1] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level2</name>
|
|
<msb>11</msb>
|
|
<bitRange>[11:8]</bitRange>
|
|
<lsb>8</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[2] read only status register]]></description>
|
|
</field>
|
|
<field>
|
|
<name>pclk_regfifo_level3</name>
|
|
<msb>15</msb>
|
|
<bitRange>[15:12]</bitRange>
|
|
<lsb>12</lsb>
|
|
<description><![CDATA[pclk_regfifo_level[3] read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_TXF3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x001c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdin</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdin read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_RXF3</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x002c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>fdout</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[fdout read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_SET</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0038</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_set</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_set read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_CLR</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x003c</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_clr</name>
|
|
<msb>23</msb>
|
|
<bitRange>[23:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_clr read/write control register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SFR_EVENT_STATUS</name>
|
|
<description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
|
|
<addressOffset>0x0040</addressOffset>
|
|
<resetValue>0x00</resetValue>
|
|
<size>32</size>
|
|
<fields>
|
|
<field>
|
|
<name>sfr_event_status</name>
|
|
<msb>31</msb>
|
|
<bitRange>[31:0]</bitRange>
|
|
<lsb>0</lsb>
|
|
<description><![CDATA[sfr_event_status read only status register]]></description>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x44</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
</peripheral>
|
|
</peripherals>
|
|
|
|
<peripheral>
|
|
<name>PL230</name>
|
|
<description>PL230 DMA Controller Core</description>
|
|
<baseAddress>1073811456</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x40</offset>
|
|
<size>0xc</size>
|
|
<usage>reserved</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4c</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>DMA Status Register</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x101f0000</resetValue>
|
|
<resetMask>0xffffff0f</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TEST_STATUS</name>
|
|
<description>Test status configuration</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CHNLS_MINUS1</name>
|
|
<description>Number of available DMA channels minus 1</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STATE</name>
|
|
<description>Current state of the control machine</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER_ENABLE</name>
|
|
<description>Master enable status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>DMA Configuration Register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_PROT_CTRL</name>
|
|
<description>Set AHB-Lite configuration</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER_ENABLE</name>
|
|
<description>MASTER_ENABLE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTRLBASEPTR</name>
|
|
<description>DMA Control Data Base Pointer Register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL_BASE_PTR</name>
|
|
<description>CTRL_BASE_PTR</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>24</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALTCTRLBASEPTR</name>
|
|
<description>DMA Channel Alternate Control Data Base Pointer Register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ALT_CTRL_BASE_PTR</name>
|
|
<description>ALT_CTRL_BASE_PTR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMA_WAITONREQ_STATUS</name>
|
|
<description>Channel wait on request status</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_WAITONREQ_STATUS</name>
|
|
<description>Wait on request status, one bit per channel</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLSWREQUEST</name>
|
|
<description>DMA Channel Software Request Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_SW_REQUEST</name>
|
|
<description>CHNL_SW_REQUEST</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLUSEBURSTSET</name>
|
|
<description>DMA Channel Useburst Set Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_USEBURST_SET</name>
|
|
<description>CHNL_USEBURST_SET</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLUSEBURSTCLR</name>
|
|
<description>DMA Channel Useburst Clear Register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_USEBURST_CLR</name>
|
|
<description>CHNL_USEBURST_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLREQMASKSET</name>
|
|
<description>DMA Channel Request Mask Set Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_REQ_MASK_SET</name>
|
|
<description>CHNL_REQ_MASK_SET</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLREQMASKCLR</name>
|
|
<description>DMA Channel Request Mask Clear Register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_REQ_MASK_CLR</name>
|
|
<description>CHNL_REQ_MASK_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLENABLESET</name>
|
|
<description>DMA Channel Enable Set Register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_ENABLE_SET</name>
|
|
<description>CHNL_ENABLE_SET</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLENABLECLR</name>
|
|
<description>DMA Channel Enable Clear Register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_ENABLE_CLR</name>
|
|
<description>CHNL_ENABLE_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLPRIALTSET</name>
|
|
<description>DMA Channel Primary-Alternate Set Register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_PRI_ALT_SET</name>
|
|
<description>CHNL_PRI_ALT_SET</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLPRIALTCLR</name>
|
|
<description>DMA Channel Primary-Alternate Clear Register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_PRI_ALT_CLR</name>
|
|
<description>CHNL_PRI_ALT_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLPRIORITYSET</name>
|
|
<description>DMA Channel Priority Set Register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_PRIORITY_SET</name>
|
|
<description>CHNL_PRIORITY_SET</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHNLPRIORITYCLR</name>
|
|
<description>DMA Channel Priority Clear Register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000000</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CHNL_PRIORITY_CLR</name>
|
|
<description>CHNL_PRIORITY_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERRCLR</name>
|
|
<description>DMA Bus Error Clear Register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERR_CLR</name>
|
|
<description>ERR_CLR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PERIPH_ID_0</name>
|
|
<description>Peripheral ID byte 0</description>
|
|
<addressOffset>0xFE0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PART_NUMBER_LSB</name>
|
|
<description>Identifies the part number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PERIPH_ID_1</name>
|
|
<description>Peripheral ID byte 1</description>
|
|
<addressOffset>0xFE4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PART_NUMBER_MSB</name>
|
|
<description>Identifies the part number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>JEP106_LSB</name>
|
|
<description>Designer ID LSB</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PERIPH_ID_2</name>
|
|
<description>Peripheral ID byte 2</description>
|
|
<addressOffset>0xFE8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xffffffff</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>JEP106_MSB</name>
|
|
<description>Designer ID MSB</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>JEDEC_USED</name>
|
|
<description>Identifies if JP106 ID code is used</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REVISION</name>
|
|
<description>Identifies revision number of peripheral</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<vendorExtensions>
|
|
<memoryRegions>
|
|
<memoryRegion>
|
|
<name>SCE</name>
|
|
<baseAddress>0x40028000</baseAddress>
|
|
<size>0x00008000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SYSCTRL</name>
|
|
<baseAddress>0x40040000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>IFSUB</name>
|
|
<baseAddress>0x50120000</baseAddress>
|
|
<size>0x00003000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>CORESUB</name>
|
|
<baseAddress>0x40010000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SECSUB</name>
|
|
<baseAddress>0x40050000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>PIO</name>
|
|
<baseAddress>0x50123000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_BDMA</name>
|
|
<baseAddress>0x50124000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_LKEY</name>
|
|
<baseAddress>0x40020000</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_KEY</name>
|
|
<baseAddress>0x40020100</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_SKEY</name>
|
|
<baseAddress>0x40020200</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_SCRT</name>
|
|
<baseAddress>0x40020300</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_MSG</name>
|
|
<baseAddress>0x40020400</baseAddress>
|
|
<size>0x00000200</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_HOUT</name>
|
|
<baseAddress>0x40020600</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_SOB</name>
|
|
<baseAddress>0x40020700</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_PCON</name>
|
|
<baseAddress>0x40020800</baseAddress>
|
|
<size>0x00000000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_PKB</name>
|
|
<baseAddress>0x40020800</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_PIB</name>
|
|
<baseAddress>0x40020C00</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_PSIB</name>
|
|
<baseAddress>0x40021000</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_POB</name>
|
|
<baseAddress>0x40021400</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_PSOB</name>
|
|
<baseAddress>0x40021800</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_AKEY</name>
|
|
<baseAddress>0x40021C00</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_AIB</name>
|
|
<baseAddress>0x40021D00</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_AOB</name>
|
|
<baseAddress>0x40021E00</baseAddress>
|
|
<size>0x00000100</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_RNGA</name>
|
|
<baseAddress>0x40021F00</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SEG_RNGB</name>
|
|
<baseAddress>0x40022300</baseAddress>
|
|
<size>0x00000400</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>IFRAM0</name>
|
|
<baseAddress>0x50000000</baseAddress>
|
|
<size>0x00020000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>IFRAM1</name>
|
|
<baseAddress>0x50020000</baseAddress>
|
|
<size>0x00020000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>NULL</name>
|
|
<baseAddress>0x50040000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>UDMA</name>
|
|
<baseAddress>0x50100000</baseAddress>
|
|
<size>0x00020000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>UDP</name>
|
|
<baseAddress>0x50122000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SDDC_DAT</name>
|
|
<baseAddress>0x50140000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>UDC</name>
|
|
<baseAddress>0x50200000</baseAddress>
|
|
<size>0x00010000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>SRAM</name>
|
|
<baseAddress>0x61000000</baseAddress>
|
|
<size>0x00200000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>RERAM</name>
|
|
<baseAddress>0x60000000</baseAddress>
|
|
<size>0x00400000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>XIP</name>
|
|
<baseAddress>0x70000000</baseAddress>
|
|
<size>0x04000000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>PL230</name>
|
|
<baseAddress>0x40011000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>MDMA</name>
|
|
<baseAddress>0x40012000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>MBOX_APB</name>
|
|
<baseAddress>0x40013000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>IOX</name>
|
|
<baseAddress>0x5012F000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>AOC</name>
|
|
<baseAddress>0x40060000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_IMEM0</name>
|
|
<baseAddress>0x50125000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_IMEM1</name>
|
|
<baseAddress>0x50126000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_IMEM2</name>
|
|
<baseAddress>0x50127000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_IMEM3</name>
|
|
<baseAddress>0x50128000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_FIFO0</name>
|
|
<baseAddress>0x50129000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_FIFO1</name>
|
|
<baseAddress>0x5012A000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_FIFO2</name>
|
|
<baseAddress>0x5012B000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
<memoryRegion>
|
|
<name>BIO_FIFO3</name>
|
|
<baseAddress>0x5012C000</baseAddress>
|
|
<size>0x00001000</size>
|
|
</memoryRegion>
|
|
</memoryRegions>
|
|
<constants>
|
|
</constants>
|
|
</vendorExtensions>
|
|
</device> |