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Alright, this one was very tricky. The problem here turns out that if the very last operation on the RTC was a write before powering off, any spurious clock/data noise is interpreted as a valid write to the RTC! Thus, if the last thing you do to the RTC before a suspend is a write of some sort, the RTC is going to be corrupted. During shutdown, the RTC lines slam up and down a couple of times: - they drop low as vcore discharges - they then pop high once vcore is dead - they then slowly drop low as vddio drops in both of these cases, they drop with a very slow (>10ms) fall time, which gives ample time for the RTC to get excited and think maybe some data is being written to it! Also on boot, there is a brief glitch of SDA/SCL at the same time, which looks very much like a start condition. Anyways, this patch does two things: 1. Performs a dummy read to a register that is "far from" any critical data resisters. This puts the I2C state machine of the RTC in "read" mode, so any future clock cycles just keep wheeling through the RTC bank as a read, instead of clocking in data as a write. There is a non-zero chance that the noise "could" emulate a valid I2C transaction (it'd have to create the bit pattern that addresses the RTC, with the right timing), but in practice this hasn't been seen. 2. Disables the RTC block on suspend, prior to suspend. This will prevent the RTC engine from issuing any new commands as the core starts to shut down. It's conceivable that e.g. the "start" bit could randomly flip high as the power goes down and since the I2C engine is now in the always-on domain it'll dutifully start clocking out bits as the power goes away. This patch seems to have stabilized the RTC corruption problem that was previously witnessed. |
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