mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-14 08:03:34 +00:00
1255bf12d9
The code base had evolved through several code names, interim names, company names and chip names that alternatively did or did not exist. Baochip is the definitive name of the company, and the Baochip1x (full part number BAO1X2S4F-WA) is the definitivey part number of the SoC. For convenience, the part number is shortened to 'bao1x' in most feature flags and variable references. This commit fixes all of the odd names and removes some unmaintained early targets.
118 lines
3 KiB
Rust
118 lines
3 KiB
Rust
use utralib::generated::*;
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#[allow(dead_code)]
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pub struct Uart {
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// pub base: *mut u32,
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}
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impl Uart {
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#[cfg(any(feature = "precursor", feature = "renode"))]
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#[allow(dead_code)]
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pub fn putc(&self, c: u8) {
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let base = utra::uart::HW_UART_BASE as *mut u32;
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let mut uart = CSR::new(base);
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// Wait until TXFULL is `0`
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while uart.r(utra::uart::TXFULL) != 0 {}
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uart.wo(utra::uart::RXTX, c as u32)
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}
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#[cfg(any(feature = "bao1x"))]
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pub fn putc(&self, c: u8) {
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let base = utra::duart::HW_DUART_BASE as *mut u32;
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let mut uart = CSR::new(base);
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while uart.r(utra::duart::SFR_SR) != 0 {}
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uart.wo(utra::duart::SFR_TXD, c as u32);
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}
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}
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use core::fmt::{Error, Write};
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impl Write for Uart {
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fn write_str(&mut self, s: &str) -> Result<(), Error> {
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for c in s.bytes() {
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self.putc(c);
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}
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Ok(())
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}
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}
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#[macro_use]
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#[cfg(all(not(test), feature = "debug-print"))]
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pub mod debug_print_hardware {
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#[macro_export]
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macro_rules! print
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{
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($($args:tt)+) => ({
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use core::fmt::Write;
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let _ = write!(crate::debug::Uart {}, $($args)+);
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});
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}
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}
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#[macro_use]
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#[cfg(all(not(test), not(feature = "debug-print")))]
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mod debug_print_hardware {
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#[macro_export]
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#[allow(unused_variables)]
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macro_rules! print {
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($($args:tt)+) => {{}};
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}
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}
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#[macro_use]
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#[cfg(test)]
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mod debug_print_hardware {
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#[macro_export]
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#[allow(unused_variables)]
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macro_rules! print {
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($($args:tt)+) => ({
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std::print!($($args)+)
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});
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}
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}
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#[macro_export]
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macro_rules! println
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{
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() => ({
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$crate::print!("\r\n")
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});
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($fmt:expr) => ({
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$crate::print!(concat!($fmt, "\r\n"))
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});
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($fmt:expr, $($args:tt)+) => ({
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$crate::print!(concat!($fmt, "\r\n"), $($args)+)
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});
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}
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pub fn print_pagetable(root: usize) {
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use crate::PageTable;
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println!("Memory Maps (SATP: {:08x} Root: {:08x}):", root, root << 12);
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let l1_pt = unsafe { &mut (*((root << 12) as *mut PageTable)) };
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for (i, l1_entry) in l1_pt.entries.iter().enumerate() {
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if *l1_entry == 0 {
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continue;
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}
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let _superpage_addr = i as u32 * (1 << 22);
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println!(
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" {:4} Superpage for {:08x} @ {:08x} (flags: {:03x})",
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i,
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_superpage_addr,
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(*l1_entry >> 10) << 12,
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l1_entry & 0x3ff
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);
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// let l0_pt_addr = ((l1_entry >> 10) << 12) as *const u32;
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let l0_pt = unsafe { &mut (*(((*l1_entry >> 10) << 12) as *mut PageTable)) };
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for (j, l0_entry) in l0_pt.entries.iter().enumerate() {
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if *l0_entry == 0 {
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continue;
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}
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let _page_addr = j as u32 * (1 << 12);
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println!(
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" {:4} {:08x} -> {:08x} (flags: {:03x})",
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j,
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_superpage_addr + _page_addr,
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(*l0_entry >> 10) << 12,
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l0_entry & 0x3ff
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);
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}
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}
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}
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