mirror of
https://github.com/saymrwulf/xous-core.git
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The code base had evolved through several code names, interim names, company names and chip names that alternatively did or did not exist. Baochip is the definitive name of the company, and the Baochip1x (full part number BAO1X2S4F-WA) is the definitivey part number of the SoC. For convenience, the part number is shortened to 'bao1x' in most feature flags and variable references. This commit fixes all of the odd names and removes some unmaintained early targets.
86 lines
3.2 KiB
TOML
86 lines
3.2 KiB
TOML
[package]
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authors = ["Sean Cross <sean@xobs.io>"]
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description = "Core kernel for Xous, including task switching and memory management"
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license = "MIT OR Apache-2.0"
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edition = "2018"
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name = "xous-kernel"
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version = "0.9.38"
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resolver = "2"
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# Dependency versions enforced by Cargo.lock.
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[dependencies]
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bitflags = "1.2.1"
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stats_alloc = { version = "0.1.8", optional = true }
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xous-kernel = { package = "xous", version = "0.9.66", features = [
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"forget-memory-messages",
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] }
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utralib = { version = "0.1.25", optional = true, default-features = false }
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rand_chacha = { version = "0.3.1", optional = true, default-features = false }
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bao1x-hal = { path = "../libs/bao1x-hal", optional = true, default-features = false }
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loader = { path = "../loader", optional = true, features = ["swap"] }
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aes = { path = "../services/aes", default-features = false, optional = true }
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[target.'cfg(any(windows,unix))'.dev-dependencies]
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xous-kernel = { package = "xous", version = "0.9.66", features = [
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"forget-memory-messages",
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"processes-as-threads",
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] }
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rand = "0.8.5"
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[target.'cfg(target_arch = "riscv32")'.dependencies]
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riscv = { version = "0.5.6", package = "xous-riscv" } # source is in "../imports/riscv-0.5.6"
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gdbstub = { version = "0.6.5", optional = true, default-features = false }
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gdbstub_arch = { version = "0.2.4", optional = true, default-features = false }
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[target.'cfg(target_arch = "arm")'.dependencies]
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armv7 = { git = "https://github.com/Foundation-Devices/armv7.git", branch = "update", features = [
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"critical-section",
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] }
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# FIXME: bring atsama5d27 target up to date so utralib dependency does not conflict
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# atsama5d27 = { git = "https://github.com/Foundation-Devices/atsama5d27.git", branch = "master" }
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xous-kernel = { package = "xous", version = "0.9.66", features = ["v2p"] }
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critical-section = "1.1.1"
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[lints.rust]
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unexpected_cfgs = { level = "warn", check-cfg = ['cfg(ci)', 'cfg(baremetal)'] }
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[features]
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vexii-test = [] # integration test for vexii, not a production configuration
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bao1x = ["utralib/bao1x", "rand_chacha", "raw-trng", "aes/bao1x"]
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verilator-only = []
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board-baosec = ["bao1x-hal/kernel-baosec", "memmap-flash", "swap"]
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board-baosor = ["bao1x-hal/kernel-baosor"]
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board-dabao = ["bao1x-hal/kernel-dabao"]
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hosted-baosec = []
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atsama5d27 = ["utralib/atsama5d27"]
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precursor = ["utralib/precursor"]
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hosted = ["utralib/hosted"]
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renode = ["utralib/renode"]
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debug-print = []
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gdb-stub = ["gdbstub", "gdbstub_arch"]
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print-panics = []
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dump-kernel-pages = [] # include kernel pages in panic dumps
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report-memory = ["stats_alloc"]
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wrap-print = []
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big-heap = [] # Cause heaps to start at 12 MM instead of 512 kB
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v2p = ["xous-kernel/v2p"]
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swap = ["xous-kernel/swap", "loader/swap"]
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memmap-flash = []
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debug-swap = []
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debug-swap-verbose = []
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raw-trng = ["xous-kernel/raw-trng"]
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# patches for simulation targets ONLY. Applying these flags will result in totally broken security.
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hwsim = []
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# default = ["print-panics", "debug-print", "wrap-print"]
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default = ["print-panics"]
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[target.'cfg(any(windows, unix))'.dependencies]
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crossbeam-channel = "0.5"
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hex = "0.4"
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lazy_static = "1.4"
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rand = "0.8.5"
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rand_chacha = "0.3.1"
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