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49 commits

Author SHA1 Message Date
Sean Cross
ed4dfd4dc1 emulation: com: update HOLD as part of Transmit 
Previously, the HOLD signal was updated in a different clock domain from
the transmission signal. This could result in the HOLD bit being set
even if there was no data available.

Update the HOLD bit if it's present as part of the Transmit cycle.

Signed-off-by: Sean Cross <sean@xobs.io>
 2022-02-14 13:52:43 +08:00
Sean Cross
11783a050e emulation: i2c: implement Reset bit on I2C 
Signed-off-by: Sean Cross <sean@xobs.io>
 2022-02-14 13:41:50 +08:00
Sean Cross
c392d8df90 emulation: BQ27421: implement more registers 
This gets the gas gauge showing more data.

Signed-off-by: Sean Cross <sean@xobs.io>
 2022-02-14 13:41:15 +08:00
Sean Cross
49e1eb19c0 emulation: connect EC 
Connect the EC to the SoC. This allows for emulating both the EC and SoC
in tandem. Messages flow via a 16-bit bus. When data is not available,
`0xdddd` is returned.

There is a HOLD line that goes from the EC to the SoC. This is tied to
the inverse of presence of data in the EC FIFO -- when it's empty, HOLD
is `1`, and when there is data it's `0`.

Signed-off-by: Sean Cross <sean@xobs.io>
 2022-02-14 12:28:40 +08:00
Sean Cross
fbbb2120ab com: working on getting com functioning 
Signed-off-by: Sean Cross <sean@xobs.io>
 2022-02-13 10:59:47 +08:00
Piotr Zierhoffer
e21e55807e Update Renode models with new ClockEntry API 2022-02-04 04:04:37 +01:00
Sean Cross
96d241acfd emulation: memlcd: reduce dirty bit count to 2 bytes 
Previously, the memlcd had 22 bytes of dirty bits following a line. This
was reduced to 2 bytes, but the logic checking the dirty bytes had not
been updated.

Reduce the dirty byte count to 2 bytes.

Signed-off-by: Sean Cross <sean@xobs.io>
 2022-01-26 12:48:04 +08:00
bunnie
40dcd28b23 move the devboot line 2022-01-25 18:22:02 +08:00
Sean Cross
63dc07d633 emulation: get more of the EC working 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-09-27 19:42:04 +08:00
Sean Cross
45d8124418 Merge branch 'main' of github.com:betrusted-io/xous-core 2021-09-15 17:18:14 +08:00
bunnie
74e2f3f2d2 add a trace debug print in engine emulation for correlation 
against cycle-accurate verilog simulator.
 2021-09-07 05:08:56 +08:00
Sean Cross
ac81da5ecf emulation: watchdog: fix watchdog timer 
This causes it to actually work.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-08-30 15:30:59 +08:00
Sean Cross
b8c23af4fd emulation: fix betrustedsoci2c implementation 
This fixes the RTC, which gets things working again.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-08-30 15:12:13 +08:00
Sean Cross
5aaf166541 emulation: implement partial ec i2c 
This implements some i2c functionality on the EC. Additionally, it
implements the Betrusted watchdog.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-08-30 12:36:04 +08:00
Sean Cross
bb9472816f emulation: add spinor_soft_int and wfi 
These two peripherals are required to run the current build.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-08-02 17:10:10 +08:00
Sean Cross
d248ab3cc7 emulation: engine: always update registers on write 
These registers get reset when the hardware is reset, however the engine
may still be running. Ensure it's not running when the device is reset.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 18:23:36 +08:00
Sean Cross
3f1593e56e emulation: engines: cache registers in RAM 
Don't consult RAM every time we want to read a register. This improves
performance at the cost of potentially having stale registers.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 18:10:38 +08:00
Sean Cross
50c5e1290d memlcd: implement vram 
Now that peripherals handle memory themselves, we need a special block
to handle video memory.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 15:56:49 +08:00
Sean Cross
9b43b7e475 emulation: engine: remove unused properties 
These properties and variables were unused, and should be removed.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 15:56:18 +08:00
Sean Cross
5ae1e437ab sha512: fix length and 512/256 calculation 
The length is now correctly calculated, and the engine properly
completes.

Additionally, a bulk 512/256 implementation has been written that works
well enough, but will fall over if asked to compute a large amount of
data.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 15:55:13 +08:00
Sean Cross
4790686dd9 engine: pass all checks with engine check 
This fixes bugs in SUB, XOR, MUL, NOT, and gets register windows working.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 11:28:53 +08:00
Sean Cross
acc981638e engine: only 4 tests are failing 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-15 09:24:19 +08:00
Sean Cross
fd5e07b983 emulation: add broken engine implementation 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-13 22:25:46 +08:00
Sean Cross
4b619bb0a9 emulation: update trng peripherals 
The register mapping for the TRNG has changed. Update these peripherals
to reflect the latest shuffle.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-13 22:24:04 +08:00
Sean Cross
4864d6bae7 emulation: implement sha512 
This implements the sha512 block.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-13 22:22:31 +08:00
Sean Cross
dfcc62b96a emulation: add keyrom 
This contains the default dev key.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-13 22:22:03 +08:00
Sean Cross
2339b7315f emulation: memlcd: add DEVBOOT register and defacement 
Add this new register as well as the defacement that occurs when it is
enabled.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-07-05 17:35:15 +08:00
Sean Cross
deb524e570 emulation: sha512: wire up done bit 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-28 21:37:42 +08:00
Sean Cross
96c3c59b72 emulation: add first draft of sha512 engine 
This should be feature complete, but has not been tested.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-28 21:34:50 +08:00
Sean Cross
2877fcc72a emulation: correctly wire keyboard inject interrupt 
This interrupt was wired to the incorrect variable.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-28 21:34:20 +08:00
Sean Cross
6b53b1e159 keyboard: map "Home" key to home button 
It just makes sense.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-26 00:40:48 +08:00
Sean Cross
e6073c585d emulation: fix mapping for down/left 
This also maps backslash to Menu.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-26 00:39:45 +08:00
Sean Cross
2c270ee355 emulation: add initial drafts of i2c for soc 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-25 23:55:04 +08:00
Sean Cross
6691c6e4a7 peripherals: sync trng blocks with latest bitstream 
The bitstream definition for the TRNG blocks has changed. Update the
Renode models to match.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-06-21 13:54:53 +08:00
Sean Cross
e0f4e0c47f emulation: fix missing interrupts in peripherals 
Now that we wire up the irq line, ensure the peripherals have actual
interrupts.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-05-19 14:12:01 +08:00
Sean Cross
428ccd2e0f emulation: memlcd: add PRESCALER register 
This register is not wired to anything.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-04-23 17:04:59 +08:00
Sean Cross
4ce311d166 emulation: trng_server: physically reorder the enum 
Signed-off-by: Sean Cross <sean@xobs.io>
 2021-04-23 14:15:11 +08:00
Sean Cross
b19dadd1c6 emulation: trng_server: fix trng register addresses 
This swaps the STATUS and DATA registers, which were incorrectly
created.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-04-23 13:58:01 +08:00
Sean Cross
560cd696ab emulation: keyboard: implement keyboard driver 
This implements a keyboard driver based on the current understanding of
the keyboard server.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-04-23 13:57:33 +08:00
Sean Cross
cb5efccdf8 emulation: ticktimer: fix spurious interrupt on init 
Due to a race condition, an IRQ was always fired when the timer was
turned on.

Force a recalculation of the IRQ state when the IRQ is turned on to
avoid firing an interrupt when none should fire.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-03-22 22:23:03 +08:00
Sean Cross
4c76bb1a3d emulation: memlcd: fix of-by-one error in redraw 
This would cause us to escape the screen under rare circumstances.

Signed-off-by: Sean Cross <sean@xobs.io>
 2021-02-10 15:21:44 +08:00
Sean Cross
e88b4cae7c emulation: update renode models to include trng 
Signed-off-by: Sean Cross <sean@xobs.io>
 2020-12-23 22:12:28 +08:00
Sean Cross
8270283868 renode: memlcd: accurately map all hardware dirty bits 
Previously we were only checking one dirty bit, which doesn't match
what's going on with the real hardware.

Check all the bits to ensure we're accurate.

Signed-off-by: Sean Cross <sean@xobs.io>
 2020-11-23 19:31:11 +08:00
Sean Cross
0ed99d1eba emulation: memlcd: format cs file 
Signed-off-by: Sean Cross <sean@xobs.io>
 2020-11-11 12:50:07 +08:00
Sean Cross
e3dbf1e9d4 emulation: ticktimer: add msleep support 
Signed-off-by: Sean Cross <sean@xobs.io>
 2020-11-04 13:41:18 +08:00
Sean Cross
ffcccab513 emulation: add ticktimer and serial uarts 
This updates renode's emulation to match the current system design.

Signed-off-by: Sean Cross <sean@xobs.io>
 2020-10-15 11:56:41 +08:00
Sean Cross
c8ccbe27c1 emulation: add initial files for lcd and keyboard 
keyboard doesn't work yet, possibly due to upstream bug.

Signed-off-by: Sean Cross <sean@xobs.io>
 2020-03-14 15:44:44 +08:00
Sean Cross
62cb867ad5 emulation: litex_timer_32: remove dead code 
Signed-off-by: Sean Cross <sean@xobs.io>
 2020-03-10 17:30:58 +08:00
Sean Cross
8b57b8c36b emulation: add 32-bit litex timer 
Litex uses 32-bit CSRs, so add a version of the litex timer module that
uses 32-bit CSRs.

Signed-off-by: Sean Cross <sean@xobs.io>
 2020-03-10 16:41:07 +08:00