Sean Cross
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ffcccab513
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emulation: add ticktimer and serial uarts
This updates renode's emulation to match the current system design.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-10-15 11:56:41 +08:00 |
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Sean Cross
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965696df8b
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emulation: fix path to loader
Loader isn't part of the workspace anymore, so its path has changed.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-08-18 17:00:19 +08:00 |
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Sean Cross
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a513800dc5
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emulation: update path to target images
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-08-17 20:01:26 +08:00 |
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Sean Cross
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a467d6fcc7
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kernel: baremetal: 2nd process starts to run and crashes
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-08-10 16:06:38 +08:00 |
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Sean Cross
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10ecacd136
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kernel: native: create process for initial processes
These all need to bootstrap themselves.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-08-09 23:08:54 +08:00 |
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Sean Cross
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8c3f931445
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messaging: first message passing example
THis commit allows us to pass Scalar messages between processes.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-30 16:07:58 +08:00 |
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Sean Cross
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d10bc2e894
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syscalls: begin adding message-passing syscalls
These are still not connected, however their existence is starting to
solidify the API.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-17 10:27:03 +08:00 |
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Sean Cross
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c2008e5fe8
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syscall: implement map_memory wrapper
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-13 20:33:08 +08:00 |
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Sean Cross
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829570713f
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README: update info on running renode
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-12 13:33:37 +08:00 |
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Sean Cross
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8b57b8c36b
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emulation: add 32-bit litex timer
Litex uses 32-bit CSRs, so add a version of the litex timer module that
uses 32-bit CSRs.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-10 16:41:07 +08:00 |
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Sean Cross
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5708bcb89a
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emulation: fix paths for boot.resc
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-10 14:44:12 +08:00 |
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Sean Cross
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f50ec67553
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initial commit
This pulls together many disparate repositories into one xous-core
repository.
Signed-off-by: Sean Cross <sean@xobs.io>
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2020-03-10 12:13:05 +08:00 |
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