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https://github.com/saymrwulf/xous-core.git
synced 2026-11-08 04:56:43 +00:00
fix baud rate on console for dabao target
frequency changes means uart nees to be re-initialized
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775726af23
commit
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1 changed files with 54 additions and 3 deletions
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@ -1,4 +1,8 @@
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#[allow(unused_imports)]
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use core::convert::TryInto;
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use bao1x_api::signatures::SIGBLOCK_LEN;
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use bao1x_api::*;
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#[allow(unused_imports)]
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use bao1x_hal::iox::Iox;
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#[cfg(feature = "bao1x")]
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@ -127,10 +131,13 @@ pub fn early_init_hw() -> u32 {
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#[cfg(feature = "board-dabao")]
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{
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let iox = Iox::new(utra::iox::HW_IOX_BASE as *mut u32);
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// this needs to be set here because alpha-0 boot1 images set it to the wrong frequency
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unsafe {
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init_clock_asic(bao1x_api::dabao::DEFAULT_FCLK_FREQUENCY);
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}
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let perclk = unsafe { init_clock_asic(bao1x_api::dabao::DEFAULT_FCLK_FREQUENCY) };
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// fixup the UART baud rate
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let _udma_uart = setup_console(&bao1x_api::BoardTypeCoding::Dabao, &iox, perclk);
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bao1x_hal::board::setup_console_pins(&iox);
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}
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// Setup some global control registers that will allow the TRNG to operate once the kernel is
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@ -147,6 +154,50 @@ pub fn early_init_hw() -> u32 {
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perclk
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}
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#[cfg(feature = "board-dabao")]
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pub fn setup_console<T: IoSetup + IoGpio>(
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board_type: &bao1x_api::BoardTypeCoding,
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iox: &T,
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perclk: u32,
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) -> bao1x_hal::udma::Uart {
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use bao1x_hal::udma::{GlobalConfig, UartIrq};
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let uart_id = match board_type {
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BoardTypeCoding::Baosec => bao1x_hal::board::setup_console_pins(iox),
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BoardTypeCoding::Dabao | BoardTypeCoding::Oem => {
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// note: we can borrow the baosec console setup only because they
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// happen to map to the same pins. OEM variants that choose different
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// pins will need to add their own case here.
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bao1x_hal::board::setup_console_pins(iox)
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}
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};
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let udma_global = GlobalConfig::new();
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udma_global.clock_on(uart_id);
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udma_global.map_event(uart_id, PeriphEventType::Uart(EventUartOffset::Rx), EventChannel::Channel0);
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udma_global.map_event(uart_id, PeriphEventType::Uart(EventUartOffset::Tx), EventChannel::Channel1);
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let baudrate: u32 = bao1x_api::UART_BAUD;
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let freq: u32 = perclk / 2;
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// the address of the UART buffer is "hard-allocated" at an offset one page from the top of
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// IFRAM0. This is a convention that must be respected by the UDMA UART library implementation
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// for things to work.
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let uart_buf_addr = crate::UART_IFRAM_ADDR;
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let mut udma_uart = unsafe {
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// safety: this is safe to call, because we set up clock and events prior to calling new.
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udma::Uart::get_handle(utra::udma_uart_2::HW_UDMA_UART_2_BASE, uart_buf_addr, uart_buf_addr)
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};
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udma_uart.set_baud(baudrate, freq);
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udma_uart.setup_async_read();
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// setup interrupt here
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let mut uart_irq = UartIrq::new();
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uart_irq.rx_irq_ena(uart_id.try_into().expect("couldn't convert uart_id"), true);
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udma_uart
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}
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// returns the actual per_clk
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#[cfg(not(feature = "simulation-only"))]
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#[allow(dead_code)]
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