diff --git a/baremetal/Cargo.toml b/baremetal/Cargo.toml index 27bd492de..460692e37 100644 --- a/baremetal/Cargo.toml +++ b/baremetal/Cargo.toml @@ -56,6 +56,7 @@ bao1x-bio = [ "xous-bio-bdma/baremetal", "xous-bio-bdma/bao1x", "xous-bio-bdma/tests", + "xous-bio-bdma/debug-print", ] # selects features for EVB target (defaults to baosec) bao1x-evb = [] @@ -74,4 +75,4 @@ trng-debug = [] verbose-debug = [] verilator-only = [] -default = ["bao1x-usb", "bao1x-trng"] +default = ["bao1x-usb", "bao1x-trng", "bao1x-bio"] diff --git a/baremetal/src/platform/bao1x/bio.rs b/baremetal/src/platform/bao1x/bio.rs index 89bff2edc..9110c828c 100644 --- a/baremetal/src/platform/bao1x/bio.rs +++ b/baremetal/src/platform/bao1x/bio.rs @@ -257,7 +257,7 @@ pub fn bdma_coincident_test(_args: &Vec, seed: u32) -> usize { passing += coincident_u32(&mut bio_ss, ifram_src, ifram_dst, seed + 0x500, "i0->i1"); println!("0->1"); - println!("DMA coincident done."); + println!("DMA coincident done, passing {}/4", passing); passing } diff --git a/baremetal/src/platform/bao1x/usb/driver.rs b/baremetal/src/platform/bao1x/usb/driver.rs index 8f0302ff3..a6c7ea119 100644 --- a/baremetal/src/platform/bao1x/usb/driver.rs +++ b/baremetal/src/platform/bao1x/usb/driver.rs @@ -22,10 +22,6 @@ pub unsafe fn init_usb() { // install the interrupt handler enable_irq(utralib::utra::irqarray1::IRQARRAY1_IRQ); - // for testing - enable_irq(utralib::utra::irqarray19::IRQARRAY19_IRQ); - let mut irqarray19 = utralib::CSR::new(utralib::utra::irqarray19::HW_IRQARRAY19_BASE as *mut u32); - irqarray19.wo(utralib::utra::irqarray19::EV_ENABLE, 0x80); unsafe { USB = Some(usb); diff --git a/baremetal/src/repl.rs b/baremetal/src/repl.rs index fd72987b0..be4a640a8 100644 --- a/baremetal/src/repl.rs +++ b/baremetal/src/repl.rs @@ -286,6 +286,7 @@ impl Repl { + 1; crate::println!("--- Starting On-Demand BIO Test Suite ---"); + crate::println!("** Debug output is on DUART, not console **"); // Local counter to replace `self.passing_tests` from the TestRunner let mut passing_tests = 0; @@ -367,9 +368,8 @@ impl Repl { } } "reset" => { - let mut rcurst = CSR::new(utra::sysctrl::HW_SYSCTRL_BASE as *mut u32); - rcurst.wo(utra::sysctrl::SFR_RCURST0, 0x55AA); - // rcurst.wo(utra::sysctrl::SFR_RCURST1, 0x55AA); + let mut csr = CSR::new(utra::sysctrl::HW_SYSCTRL_BASE as *mut u32); + csr.wo(utra::sysctrl::SFR_RCURST0, 0x0000_55aa); } #[cfg(feature = "bao1x")] "clocks" => {