mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-14 08:03:34 +00:00
harmonize simulation models to soc description
This commit is contained in:
bunnie
parent
a735cfa602
commit
c79edf3fa5
6 changed files with 5354 additions and 5381 deletions
|
|
@ -136,7 +136,7 @@ fn main() {
|
|||
#[cfg(not(feature="ext"))]
|
||||
xous::MemoryAddress::new(utra::mb_client::HW_MB_CLIENT_BASE),
|
||||
#[cfg(feature="ext")]
|
||||
xous::MemoryAddress::new(utralib::HW_MBOX_EXT_MEM), // replace with utra::mb_ext::HW_MB_EXT_BASE after final integration
|
||||
xous::MemoryAddress::new(utra::mbox_apb::HW_MBOX_APB_BASE),
|
||||
None,
|
||||
4096,
|
||||
xous::MemoryFlags::R | xous::MemoryFlags::W,
|
||||
|
|
@ -145,7 +145,7 @@ fn main() {
|
|||
let mb_client = CSR::new(mb_client_csr.as_mut_ptr() as *mut u32);
|
||||
#[cfg(feature="ext")]
|
||||
let mb_client_irq_csr = xous::syscall::map_memory(
|
||||
xous::MemoryAddress::new(utra::irqarray3::HW_IRQARRAY3_BASE),
|
||||
xous::MemoryAddress::new(utra::irqarray19::HW_IRQARRAY19_BASE),
|
||||
None,
|
||||
4096,
|
||||
xous::MemoryFlags::R | xous::MemoryFlags::W,
|
||||
|
|
@ -165,15 +165,15 @@ fn main() {
|
|||
#[cfg(not(feature="ext"))]
|
||||
utra::mb_client::MB_CLIENT_IRQ,
|
||||
#[cfg(feature="ext")]
|
||||
utra::irqarray3::IRQARRAY3_IRQ,
|
||||
utra::irqarray19::IRQARRAY19_IRQ,
|
||||
handle_irq,
|
||||
(&mut mb_client) as *mut MailboxClient as *mut usize,
|
||||
)
|
||||
.expect("couldn't claim irq");
|
||||
#[cfg(feature="ext")]
|
||||
mb_client.csr_irq.wo(utra::irqarray3::EV_EDGE_TRIGGERED, 0b1110); // filter for rising edges on these bits
|
||||
mb_client.csr_irq.wo(utra::irqarray19::EV_EDGE_TRIGGERED, 0b1110); // filter for rising edges on these bits
|
||||
#[cfg(feature="ext")]
|
||||
mb_client.csr_irq.wo(utra::irqarray3::EV_POLARITY, 0b1110); // rising edge
|
||||
mb_client.csr_irq.wo(utra::irqarray19::EV_POLARITY, 0b1110); // rising edge
|
||||
|
||||
mb_client.csr_irq.wo(utra::mb_client::EV_ENABLE, 0b1111); // enable everything
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -13258,6 +13258,128 @@ position to clear the flag]]></description>
|
|||
<usage>registers</usage>
|
||||
</addressBlock>
|
||||
</peripheral>
|
||||
<peripheral>
|
||||
<name>MBOX_APB</name>
|
||||
<baseAddress>0x40013000</baseAddress>
|
||||
<groupName>MBOX_APB</groupName>
|
||||
<registers>
|
||||
<register>
|
||||
<name>SFR_WDATA</name>
|
||||
<addressOffset>0x0000</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>sfr_wdata</name>
|
||||
<msb>31</msb>
|
||||
<bitRange>[31:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[sfr_wdata read/write control register]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>SFR_RDATA</name>
|
||||
<addressOffset>0x0004</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>sfr_rdata</name>
|
||||
<msb>31</msb>
|
||||
<bitRange>[31:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[sfr_rdata read only status register]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>SFR_STATUS</name>
|
||||
<addressOffset>0x0008</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>rx_avail</name>
|
||||
<msb>0</msb>
|
||||
<bitRange>[0:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[rx_avail read only status register]]></description>
|
||||
</field>
|
||||
<field>
|
||||
<name>tx_free</name>
|
||||
<msb>1</msb>
|
||||
<bitRange>[1:1]</bitRange>
|
||||
<lsb>1</lsb>
|
||||
<description><![CDATA[tx_free read only status register]]></description>
|
||||
</field>
|
||||
<field>
|
||||
<name>abort_in_progress</name>
|
||||
<msb>2</msb>
|
||||
<bitRange>[2:2]</bitRange>
|
||||
<lsb>2</lsb>
|
||||
<description><![CDATA[abort_in_progress read only status register]]></description>
|
||||
</field>
|
||||
<field>
|
||||
<name>abort_ack</name>
|
||||
<msb>3</msb>
|
||||
<bitRange>[3:3]</bitRange>
|
||||
<lsb>3</lsb>
|
||||
<description><![CDATA[abort_ack read only status register]]></description>
|
||||
</field>
|
||||
<field>
|
||||
<name>tx_err</name>
|
||||
<msb>4</msb>
|
||||
<bitRange>[4:4]</bitRange>
|
||||
<lsb>4</lsb>
|
||||
<description><![CDATA[tx_err read only status register]]></description>
|
||||
</field>
|
||||
<field>
|
||||
<name>rx_err</name>
|
||||
<msb>5</msb>
|
||||
<bitRange>[5:5]</bitRange>
|
||||
<lsb>5</lsb>
|
||||
<description><![CDATA[rx_err read only status register]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>SFR_ABORT</name>
|
||||
<addressOffset>0x0018</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>sfr_abort</name>
|
||||
<msb>31</msb>
|
||||
<bitRange>[31:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[sfr_abort performs action on write of value: 0x1]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>SFR_DONE</name>
|
||||
<addressOffset>0x001c</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>sfr_done</name>
|
||||
<msb>31</msb>
|
||||
<bitRange>[31:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[sfr_done performs action on write of value: 0x1]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
</registers>
|
||||
<addressBlock>
|
||||
<offset>0</offset>
|
||||
<size>0x20</size>
|
||||
<usage>registers</usage>
|
||||
</addressBlock>
|
||||
</peripheral>
|
||||
<peripheral>
|
||||
<name>GLUECHAIN</name>
|
||||
<baseAddress>0x40054000</baseAddress>
|
||||
|
|
@ -14330,8 +14452,8 @@ position to clear the flag]]></description>
|
|||
<size>0x00001000</size>
|
||||
</memoryRegion>
|
||||
<memoryRegion>
|
||||
<name>MBOX_EXT</name>
|
||||
<baseAddress>0x50124000</baseAddress>
|
||||
<name>MBOX_APB</name>
|
||||
<baseAddress>0x40013000</baseAddress>
|
||||
<size>0x00001000</size>
|
||||
</memoryRegion>
|
||||
</memoryRegions>
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
|
||||
<vendor>litex</vendor>
|
||||
<name>SOC</name>
|
||||
<description><![CDATA[Litex SoC 2023-08-08 18:17:59]]></description>
|
||||
<description><![CDATA[Litex SoC 2023-08-09 03:07:34]]></description>
|
||||
|
||||
<addressUnitBits>8</addressUnitBits>
|
||||
<width>32</width>
|
||||
|
|
@ -657,23 +657,8 @@ register to disable individual events.]]></description>
|
|||
<fields>
|
||||
<field>
|
||||
<name>trigger</name>
|
||||
<msb>19</msb>
|
||||
<bitRange>[19:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[Triggers for interrupt testing bank 0]]></description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>IRQTEST1</name>
|
||||
<addressOffset>0x001c</addressOffset>
|
||||
<resetValue>0x00</resetValue>
|
||||
<size>32</size>
|
||||
<fields>
|
||||
<field>
|
||||
<name>trigger</name>
|
||||
<msb>19</msb>
|
||||
<bitRange>[19:0]</bitRange>
|
||||
<msb>15</msb>
|
||||
<bitRange>[15:0]</bitRange>
|
||||
<lsb>0</lsb>
|
||||
<description><![CDATA[Triggers for interrupt testing bank 0]]></description>
|
||||
</field>
|
||||
|
|
@ -682,7 +667,7 @@ register to disable individual events.]]></description>
|
|||
</registers>
|
||||
<addressBlock>
|
||||
<offset>0</offset>
|
||||
<size>0x20</size>
|
||||
<size>0x1c</size>
|
||||
<usage>registers</usage>
|
||||
</addressBlock>
|
||||
</peripheral>
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue