mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-08 04:56:43 +00:00
move assembly header into in-line assembly
This commit is contained in:
bunnie
parent
0c9f8c57c2
commit
bdc0b79906
11 changed files with 120 additions and 74 deletions
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@ -112,7 +112,7 @@ exclude = [
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[profile.release]
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codegen-units = 1 # 1 better optimizations
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debug = false
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strip = true
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strip = false
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lto = "fat"
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incremental = true
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#panic = "abort" # Remove panic output, which can reduce file size
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@ -1,18 +0,0 @@
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# remove existing blobs because otherwise this will append object files to the old blobs
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Remove-Item -Force bin/*.a
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$crate = "xous-kernel"
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32imac src/asm.S -o bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv32imac-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv32imac-unknown-xous-elf.a bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv32imc-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32i src/asm.S -DSKIP_MULTICORE -o bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv32i-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=lp64 -march=rv64imac src/asm.S -o bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv64imac-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-ar crs bin/riscv64gc-unknown-none-elf.a bin/$crate.o
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Remove-Item bin/$crate.o
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@ -1,23 +0,0 @@
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#!/usr/bin/env bash
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set -euxo pipefail
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crate=xous-kernel
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# remove existing blobs because otherwise this will append object files to the old blobs
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mkdir -p bin
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rm -f bin/*.a
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32imac src/asm.S -o bin/$crate.o
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ar crs bin/riscv32imac-unknown-none-elf.a bin/$crate.o
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ar crs bin/riscv32imac-unknown-xous-elf.a bin/$crate.o
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ar crs bin/riscv32imc-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=ilp32 -march=rv32i src/asm.S -DSKIP_MULTICORE -o bin/$crate.o
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ar crs bin/riscv32i-unknown-none-elf.a bin/$crate.o
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riscv64-unknown-elf-gcc -ggdb3 -c -mabi=lp64 -march=rv64imac src/asm.S -o bin/$crate.o
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ar crs bin/riscv64imac-unknown-none-elf.a bin/$crate.o
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ar crs bin/riscv64gc-unknown-none-elf.a bin/$crate.o
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rm bin/$crate.o
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@ -7,17 +7,9 @@ use std::path::PathBuf;
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fn main() {
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let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
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let target = env::var("TARGET").unwrap();
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let name = env::var("CARGO_PKG_NAME").unwrap();
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if target.starts_with("riscv") {
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fs::copy(
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format!("bin/{}.a", target),
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out_dir.join(format!("lib{}.a", name)),
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).unwrap();
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println!("cargo:rustc-link-lib=static={}", name);
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println!("cargo:rustc-link-search={}", out_dir.display());
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println!("cargo:rerun-if-changed=bin/{}.a", target);
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println!("cargo:rustc-link-arg=-Tlink.x");
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}
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@ -12,6 +12,7 @@ pub const BACKUP_ARGS_ADDR: usize = crate::platform::RAM_BASE + crate::platform:
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use core::num::NonZeroUsize;
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use core::{mem, ptr, slice};
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use core::arch::asm;
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pub type XousPid = u8;
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pub const PAGE_SIZE: usize = 4096;
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@ -534,19 +535,115 @@ pub struct ProgramDescription {
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entrypoint: u32,
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}
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extern "C" {
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fn start_kernel(
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args: usize,
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ss: usize,
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rpt: usize,
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satp: usize,
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entrypoint: usize,
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stack: usize,
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debug: bool,
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resume: bool,
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) -> !;
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#[link_section = ".text.init"]
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#[export_name = "_start"]
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pub extern "C" fn _start() {
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unsafe {
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asm! (
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"li t0, 0xffffffff",
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"csrw mideleg, t0",
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"csrw medeleg, t0",
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// decorate our stack area with a canary pattern
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"li t1, 0xACE0BACE",
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"li t0, 0x40FFE01C", // currently allowed stack extent - 8k - (7 words) - 7 words for kernel backup args - see bootloader in betrusted-soc
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"li t2, 0x41000000",
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"100:", // fillstack
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"sw t1, 0(t0)",
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"addi t0, t0, 4",
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"bltu t0, t2, 100b",
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// Place the stack pointer at the end of RAM
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"li t0, 0x40000000", // SRAM start hard-coded into loader -- don't trust kernel boot args to tell us where RAM is, we haven't validated them yet!
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"li t1, 0x01000000", // SRAM length
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"add sp, t0, t1",
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// Install a machine mode trap handler
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"la t0, abort",
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"csrw mtvec, t0",
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// Start Rust
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"j rust_entry",
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options(noreturn)
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);
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}
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}
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#[link_section = ".text.init"]
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#[export_name = "abort"]
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/// This is only used in debug mode
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pub extern "C" fn abort() {
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unsafe {
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asm! (
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"300:", // abort
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"j 300b",
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options(noreturn)
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);
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}
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}
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#[inline(never)]
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#[export_name = "start_kernel"]
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pub extern "C" fn start_kernel(
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args: usize,
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ss: usize,
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rpt: usize,
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satp: usize,
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entrypoint: usize,
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stack: usize,
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debug_: bool,
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resume_: bool,
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) -> ! {
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let debug: usize = if debug_ { 1 } else { 0 };
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let resume: usize = if resume_ { 1 } else { 0 };
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unsafe {
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asm! (
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// these generate redundant mv's but it ensures that the arguments are marked as used
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"mv a0, {args}",
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"mv a1, {ss}",
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"mv a2, {rpt}",
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"mv a7, {resume}",
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// Delegate as much as we can supervisor mode
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"li t0, 0xffffffff",
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"csrw mideleg, t0",
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"csrw medeleg, t0",
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// Return to Supervisor mode (1 << 11) when we call `reti`.
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// Disable interrupts (0 << 5)
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"li t0, (1 << 11) | (0 << 5)",
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// If arg6 is "true", also set mstatus.SUM to allow the kernel
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// to access userspace memory.
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"mv a6, {debug}",
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"andi a6, a6, 1",
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"slli a6, a6, 18",
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"or t0, t0, a6",
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"csrw mstatus, t0",
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// Enable the MMU (once we issue `mret`) and flush the cache
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"csrw satp, {satp}",
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"sfence.vma",
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// Return to the address pointed to by $a4
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"csrw mepc, {entrypoint}",
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// Reposition the stack at the offset passed by $a5
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"mv sp, {stack}",
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// Issue the return, which will jump to $mepc in Supervisor mode
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"mret",
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args = in(reg) args,
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ss = in(reg) ss,
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rpt = in(reg) rpt,
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satp = in(reg) satp,
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entrypoint = in(reg) entrypoint,
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stack = in(reg) stack,
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debug = in(reg) debug,
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resume = in(reg) resume,
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options(noreturn)
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);
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}
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}
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impl ProgramDescription {
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/// Map this ProgramDescription into RAM.
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@ -1538,18 +1635,16 @@ fn boot_sequence(args: KernelArguments, _signature: u32) -> ! {
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let mut gpio_csr = CSR::new(utra::gpio::HW_GPIO_BASE as *mut u32);
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gpio_csr.wfo(utra::gpio::UARTSEL_UARTSEL, 1); // patch us over to a different UART for debug (1=LOG 2=APP, 0=KERNEL(hw reset default))
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unsafe {
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start_kernel(
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arg_offset,
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ip_offset,
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rpt_offset,
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cfg.processes[0].satp,
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cfg.processes[0].entrypoint,
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cfg.processes[0].sp,
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cfg.debug,
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clean,
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);
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}
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start_kernel(
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arg_offset,
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ip_offset,
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rpt_offset,
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cfg.processes[0].satp,
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cfg.processes[0].entrypoint,
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cfg.processes[0].sp,
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cfg.debug,
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clean,
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);
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} else {
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#[cfg(feature="resume")]
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unsafe {
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@ -1566,7 +1661,7 @@ fn boot_sequence(args: KernelArguments, _signature: u32) -> ! {
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println!("Adjusting SATP to the sures process. Was: 0x{:08x} now: 0x{:08x}", (*backup_args)[3], satp);
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#[cfg(not(feature = "renode-bypass"))]
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if true {
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{
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use utralib::generated::*;
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let mut gpio_csr = CSR::new(utra::gpio::HW_GPIO_BASE as *mut u32);
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gpio_csr.wfo(utra::gpio::UARTSEL_UARTSEL, 0); // patch us over to a different UART for debug (1=LOG 2=APP, 0=KERNEL(default))
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