From b241b84014a5f50a6500a9597eb40dc2a9de312f Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Wed, 23 Jul 2025 01:22:14 +0800
Subject: [PATCH] update soc details to add some reporting conveniences

---
 utralib/cramium/soc.svd               | 19 +++++++++++++++++--
 utralib/src/generated/cramium_fpga.rs | 13 ++++++++++++-
 2 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/utralib/cramium/soc.svd b/utralib/cramium/soc.svd
index 3612be918..d2a669edd 100644
--- a/utralib/cramium/soc.svd
+++ b/utralib/cramium/soc.svd
@@ -3,7 +3,7 @@
 <device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
     <vendor>litex</vendor>
     <name>SOC</name>
-    <description><![CDATA[Litex SoC 2024-11-30 01:26:25]]></description>
+    <description><![CDATA[Litex SoC 2025-07-23 01:19:07]]></description>
 
     <addressUnitBits>8</addressUnitBits>
     <width>32</width>
@@ -75,10 +75,25 @@
                         </field>
                     </fields>
                 </register>
+                <register>
+                    <name>REPORT</name>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>report</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[Fast feedback for simulations]]></description>
+                        </field>
+                    </fields>
+                </register>
             </registers>
             <addressBlock>
                 <offset>0</offset>
-                <size>0x8</size>
+                <size>0xc</size>
                 <usage>registers</usage>
             </addressBlock>
         </peripheral>
diff --git a/utralib/src/generated/cramium_fpga.rs b/utralib/src/generated/cramium_fpga.rs
index 2ab8da9cc..54f5118ca 100644
--- a/utralib/src/generated/cramium_fpga.rs
+++ b/utralib/src/generated/cramium_fpga.rs
@@ -458,7 +458,7 @@ pub mod utra {
     }
 
     pub mod main {
-        pub const MAIN_NUMREGS: usize = 2;
+        pub const MAIN_NUMREGS: usize = 3;
 
         pub const DONE: crate::Register = crate::Register::new(0, 0x1);
         pub const DONE_DONE: crate::Field = crate::Field::new(1, 0, DONE);
@@ -466,6 +466,9 @@ pub mod utra {
         pub const IRQTEST0: crate::Register = crate::Register::new(1, 0xffff);
         pub const IRQTEST0_TRIGGER: crate::Field = crate::Field::new(16, 0, IRQTEST0);
 
+        pub const REPORT: crate::Register = crate::Register::new(2, 0xffffffff);
+        pub const REPORT_REPORT: crate::Field = crate::Field::new(32, 0, REPORT);
+
         pub const HW_MAIN_BASE: usize = 0x40081000;
     }
 
@@ -5676,6 +5679,14 @@ mod tests {
         let mut baz = main_csr.zf(utra::main::IRQTEST0_TRIGGER, bar);
         baz |= main_csr.ms(utra::main::IRQTEST0_TRIGGER, 1);
         main_csr.wfo(utra::main::IRQTEST0_TRIGGER, baz);
+
+        let foo = main_csr.r(utra::main::REPORT);
+        main_csr.wo(utra::main::REPORT, foo);
+        let bar = main_csr.rf(utra::main::REPORT_REPORT);
+        main_csr.rmwf(utra::main::REPORT_REPORT, bar);
+        let mut baz = main_csr.zf(utra::main::REPORT_REPORT, bar);
+        baz |= main_csr.ms(utra::main::REPORT_REPORT, 1);
+        main_csr.wfo(utra::main::REPORT_REPORT, baz);
   }
 
     #[test]