mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-15 08:30:02 +00:00
llio: don't install interrupt handler in ::new()
Wait until after the struct is created. This will cause it to be placed in a fixed address, which works around an issue that appeared in 1.71.0. Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross
parent
539ca0cb56
commit
80ce69e018
3 changed files with 46 additions and 41 deletions
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@ -117,34 +117,37 @@ impl I2cStateMachine {
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// disable interrupt, just in case it's enabled from e.g. a warm boot
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i2c.i2c_csr.wfo(utra::i2c::EV_ENABLE_TXRX_DONE, 0);
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i2c
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}
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pub fn setup(&mut self) {
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xous::claim_interrupt(
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utra::i2c::I2C_IRQ,
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handle_i2c_irq,
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(&mut i2c) as *mut I2cStateMachine as *mut usize,
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self as *mut I2cStateMachine as *mut usize,
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)
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.expect("couldn't claim I2C irq");
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i2c.i2c_csr.wfo(utra::i2c::CORE_RESET_RESET, 1);
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i2c.ticktimer.sleep_ms(10).ok();
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self.i2c_csr.wfo(utra::i2c::CORE_RESET_RESET, 1);
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self.ticktimer.sleep_ms(10).ok();
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// initialize i2c clocks
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// set the prescale assuming 100MHz cpu operation: 100MHz / ( 5 * 100kHz ) - 1 = 199
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let clkcode = (utralib::LITEX_CONFIG_CLOCK_FREQUENCY as u32) / (5 * 100_000) - 1;
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i2c.i2c_csr.wfo(utra::i2c::PRESCALE_PRESCALE, clkcode & 0xFFFF);
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self.i2c_csr.wfo(utra::i2c::PRESCALE_PRESCALE, clkcode & 0xFFFF);
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// enable the block
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i2c.i2c_csr.rmwf(utra::i2c::CONTROL_EN, 1);
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self.i2c_csr.rmwf(utra::i2c::CONTROL_EN, 1);
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// clear any interrupts pending, just in case something went pear-shaped during initialization
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i2c.i2c_csr.wo(utra::i2c::EV_PENDING, i2c.i2c_csr.r(utra::i2c::EV_PENDING));
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self.i2c_csr.wo(utra::i2c::EV_PENDING, self.i2c_csr.r(utra::i2c::EV_PENDING));
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// now enable interrupts
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i2c.i2c_csr.wfo(utra::i2c::EV_ENABLE_TXRX_DONE, 1);
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self.i2c_csr.wfo(utra::i2c::EV_ENABLE_TXRX_DONE, 1);
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// setup suspend/resume manager
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i2c.i2c_susres.push(RegOrField::Field(utra::i2c::PRESCALE_PRESCALE), None);
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i2c.i2c_susres.push(RegOrField::Reg(utra::i2c::CONTROL), None);
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i2c.i2c_susres.push_fixed_value(RegOrField::Reg(utra::i2c::EV_PENDING), 0xFFFF_FFFF); // clear pending interrupts
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i2c.i2c_susres.push(RegOrField::Reg(utra::i2c::EV_ENABLE), None);
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i2c
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self.i2c_susres.push(RegOrField::Field(utra::i2c::PRESCALE_PRESCALE), None);
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self.i2c_susres.push(RegOrField::Reg(utra::i2c::CONTROL), None);
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self.i2c_susres.push_fixed_value(RegOrField::Reg(utra::i2c::EV_PENDING), 0xFFFF_FFFF); // clear pending interrupts
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self.i2c_susres.push(RegOrField::Reg(utra::i2c::EV_ENABLE), None);
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}
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pub fn get_expiry(&self) -> Option<u64> {
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self.expiry
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}
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@ -121,7 +121,7 @@ impl Llio {
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let ticktimer = ticktimer_server::Ticktimer::new().expect("Couldn't connect to Ticktimer");
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let mut xl = Llio {
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Llio {
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gpio_csr: CSR::new(gpio_base),
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gpio_susres: RegManager::new(gpio_base),
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info_csr: CSR::new(info_csr.as_mut_ptr() as *mut u32),
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@ -136,54 +136,55 @@ impl Llio {
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activity_period: 24_000_000, // 2 second interval initially
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destruct_armed: false,
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uartmux_cache: BOOT_UART.into(),
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};
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}
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}
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pub(crate) fn init(&mut self) {
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xous::claim_interrupt(
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utra::btevents::BTEVENTS_IRQ,
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handle_event_irq,
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(&mut xl) as *mut Llio as *mut usize,
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self as *mut Llio as *mut usize,
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)
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.expect("couldn't claim BtEvents irq");
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xous::claim_interrupt(
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utra::gpio::GPIO_IRQ,
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handle_gpio_irq,
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(&mut xl) as *mut Llio as *mut usize,
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self as *mut Llio as *mut usize,
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)
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.expect("couldn't claim GPIO irq");
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xous::claim_interrupt(
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utra::power::POWER_IRQ,
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handle_power_irq,
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(&mut xl) as *mut Llio as *mut usize,
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self as *mut Llio as *mut usize,
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)
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.expect("couldn't claim Power irq");
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xl.gpio_susres.push(RegOrField::Reg(utra::gpio::DRIVE), None);
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xl.gpio_susres.push(RegOrField::Reg(utra::gpio::OUTPUT), None);
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xl.gpio_susres.push(RegOrField::Reg(utra::gpio::INTPOL), None);
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xl.gpio_susres.push(RegOrField::Reg(utra::gpio::INTENA), None);
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xl.gpio_susres.push_fixed_value(RegOrField::Reg(utra::gpio::EV_PENDING), 0xFFFF_FFFF);
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xl.gpio_susres.push(RegOrField::Reg(utra::gpio::EV_ENABLE), None);
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xl.gpio_susres.push(RegOrField::Field(utra::gpio::UARTSEL_UARTSEL), None);
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self.gpio_susres.push(RegOrField::Reg(utra::gpio::DRIVE), None);
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self.gpio_susres.push(RegOrField::Reg(utra::gpio::OUTPUT), None);
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self.gpio_susres.push(RegOrField::Reg(utra::gpio::INTPOL), None);
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self.gpio_susres.push(RegOrField::Reg(utra::gpio::INTENA), None);
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self.gpio_susres.push_fixed_value(RegOrField::Reg(utra::gpio::EV_PENDING), 0xFFFF_FFFF);
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self.gpio_susres.push(RegOrField::Reg(utra::gpio::EV_ENABLE), None);
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self.gpio_susres.push(RegOrField::Field(utra::gpio::UARTSEL_UARTSEL), None);
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xl.event_susres.push_fixed_value(RegOrField::Reg(utra::btevents::EV_PENDING), 0xFFFF_FFFF);
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xl.event_susres.push(RegOrField::Reg(utra::btevents::EV_ENABLE), None);
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self.event_susres.push_fixed_value(RegOrField::Reg(utra::btevents::EV_PENDING), 0xFFFF_FFFF);
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self.event_susres.push(RegOrField::Reg(utra::btevents::EV_ENABLE), None);
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xl.power_csr.rmwf(utra::power::POWER_CRYPTO_ON, 0); // save power on crypto block
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xl.power_susres.push(RegOrField::Reg(utra::power::POWER), None);
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xl.power_susres.push(RegOrField::Reg(utra::power::VIBE), None);
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self.power_csr.rmwf(utra::power::POWER_CRYPTO_ON, 0); // save power on crypto block
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self.power_susres.push(RegOrField::Reg(utra::power::POWER), None);
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self.power_susres.push(RegOrField::Reg(utra::power::VIBE), None);
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xl.power_csr.wfo(utra::power::SAMPLING_PERIOD_SAMPLE_PERIOD, xl.activity_period); // 2 second sampling intervals
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xl.power_susres.push(RegOrField::Reg(utra::power::SAMPLING_PERIOD), None);
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xl.power_csr.wfo(utra::power::EV_PENDING_ACTIVITY_UPDATE, 1);
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xl.power_csr.rmwf(utra::power::EV_ENABLE_ACTIVITY_UPDATE, 1);
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self.power_csr.wfo(utra::power::SAMPLING_PERIOD_SAMPLE_PERIOD, self.activity_period); // 2 second sampling intervals
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self.power_susres.push(RegOrField::Reg(utra::power::SAMPLING_PERIOD), None);
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self.power_csr.wfo(utra::power::EV_PENDING_ACTIVITY_UPDATE, 1);
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self.power_csr.rmwf(utra::power::EV_ENABLE_ACTIVITY_UPDATE, 1);
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xl.power_susres.push_fixed_value(RegOrField::Reg(utra::power::EV_PENDING), 0xFFFF_FFFF);
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xl.power_susres.push(RegOrField::Reg(utra::power::EV_ENABLE), None);
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xl
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self.power_susres.push_fixed_value(RegOrField::Reg(utra::power::EV_PENDING), 0xFFFF_FFFF);
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self.power_susres.push(RegOrField::Reg(utra::power::EV_ENABLE), None);
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}
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pub(crate) fn get_power_csr_raw(&self) -> *mut u32 {
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self.power_csr_raw
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}
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@ -448,4 +449,3 @@ impl Llio {
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self.power_csr.rmwf(utra::power::EV_ENABLE_USB_ATTACH, value);
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}
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}
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@ -35,7 +35,8 @@ fn i2c_thread(i2c_sid: xous::SID, power_csr_raw: u32, wfi_state: Arc::<AtomicBoo
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let xns = xous_names::XousNames::new().unwrap();
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let handler_conn = xous::connect(i2c_sid).expect("couldn't make handler connection for i2c");
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let mut i2c = i2c::I2cStateMachine::new(handler_conn, power_csr_raw as *mut u32, wfi_state);
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let mut i2c = Box::new(i2c::I2cStateMachine::new(handler_conn, power_csr_raw as *mut u32, wfi_state));
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i2c.setup();
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// register a suspend/resume listener
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let self_cid = xous::connect(i2c_sid).expect("couldn't create suspend callback connection");
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@ -250,7 +251,8 @@ fn main() -> ! {
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// Create a new llio object
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let handler_conn = xous::connect(llio_sid).expect("can't create IRQ handler connection");
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let mut llio = Llio::new(handler_conn, gpio_base);
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let mut llio = Box::new(Llio::new(handler_conn, gpio_base));
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llio.init();
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llio.ec_power_on(); // ensure this is set correctly; if we're on, we always want the EC on.
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log::debug!("registered I2C thread with NS -- {:?}", i2c_sid);
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