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update board definition to NTO/baosec production pinouts

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This commit is contained in:
bunnie 2025-08-10 01:50:26 +08:00
parent 38bd899c9f
commit 7dd0ffaadd
1 changed files with 13 additions and 13 deletions
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26
libs/cramium-hal/src/board/baosec.rs
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@ -189,10 +189,10 @@ pub fn setup_i2c_pins(iox: &dyn IoSetup) -> I2cChannel {
Some(IoxEnable::Enable),
Some(IoxDriveStrength::Drive2mA),
);
// PB13 -> PMIC IRQ
// PB15 -> PMIC IRQ
iox.setup_pin(
IoxPort::PB,
13,
15,
Some(IoxDir::Input),
Some(IoxFunction::Gpio),
Some(IoxEnable::Enable),
@ -234,10 +234,11 @@ pub fn setup_camera_pins<T: IoSetup + IoGpio>(iox: &T) -> (IoxPort, u8) {
}
/// returns the USB SE0 port and pin number
const SE0_PIN: u8 = 14;
/// TODO: remove this - not actually present on NTO baosec
const SE0_PIN: u8 = 6;
pub fn setup_usb_pins<T: IoSetup + IoGpio>(iox: &T) -> (IoxPort, u8) {
iox.setup_pin(
IoxPort::PB,
IoxPort::PC,
SE0_PIN,
Some(IoxDir::Output),
Some(IoxFunction::Gpio),
@ -246,15 +247,14 @@ pub fn setup_usb_pins<T: IoSetup + IoGpio>(iox: &T) -> (IoxPort, u8) {
Some(IoxEnable::Enable),
Some(IoxDriveStrength::Drive2mA),
);
iox.set_gpio_pin_value(IoxPort::PB, SE0_PIN, IoxValue::Low);
(IoxPort::PB, SE0_PIN)
iox.set_gpio_pin_value(IoxPort::PC, SE0_PIN, IoxValue::Low);
(IoxPort::PC, SE0_PIN)
}
// These constants definitely change for NTO. These will only work on NTO.
const KB_PORT: IoxPort = IoxPort::PD;
const R_PINS: [u8; 3] = [0, 1, 4];
const C_PINS: [u8; 3] = [5, 6, 7];
pub fn setup_kb_pins<T: IoSetup + IoGpio>(iox: &T) -> ([(IoxPort, u8); 3], [(IoxPort, u8); 3]) {
const KB_PORT: IoxPort = IoxPort::PF;
const R_PINS: [u8; 2] = [6, 7];
const C_PINS: [u8; 4] = [2, 3, 4, 5];
pub fn setup_kb_pins<T: IoSetup + IoGpio>(iox: &T) -> ([(IoxPort, u8); 2], [(IoxPort, u8); 4]) {
for r in R_PINS {
iox.setup_pin(
KB_PORT,
@ -282,8 +282,8 @@ pub fn setup_kb_pins<T: IoSetup + IoGpio>(iox: &T) -> ([(IoxPort, u8); 3], [(Iox
);
}
(
[(KB_PORT, R_PINS[0]), (KB_PORT, R_PINS[1]), (KB_PORT, R_PINS[2])],
[(KB_PORT, C_PINS[0]), (KB_PORT, C_PINS[1]), (KB_PORT, C_PINS[2])],
[(KB_PORT, R_PINS[0]), (KB_PORT, R_PINS[1])],
[(KB_PORT, C_PINS[0]), (KB_PORT, C_PINS[1]), (KB_PORT, C_PINS[2]), (KB_PORT, C_PINS[3])],
)
}