mirror of
https://github.com/saymrwulf/xous-core.git
synced 2026-11-09 05:04:17 +00:00
re-institute manual cache flushing because we're seeing a CI error triggered by a cache flush failure...
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6f255d1e44
commit
78e72e6ef4
1 changed files with 15 additions and 2 deletions
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@ -15,6 +15,7 @@ use std::collections::HashSet;
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#[cfg(any(feature="precursor", feature="renode"))]
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mod implementation {
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use utralib::generated::*;
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use xous::MemoryRange;
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use crate::api::*;
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use susres::{RegManager, RegOrField, SuspendResume};
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use core::sync::atomic::{AtomicBool, AtomicU32, Ordering};
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@ -387,6 +388,8 @@ mod implementation {
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while csr.rf(utra::spinor::STATUS_WIP) != 0 {}
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}
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const CACHE_LINE_WIDTH: usize = 32;
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const FLUSH_SIZE_BYTES: usize = 16384 * 4; // cache capacity * 4 ways
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pub struct Spinor {
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id: u32,
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handler_conn: xous::CID,
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@ -396,6 +399,7 @@ mod implementation {
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cur_op: Option<FlashOp>,
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ticktimer: ticktimer_server::Ticktimer,
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// TODO: refactor ecup command to use spinor to operate the reads
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flusher: MemoryRange,
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}
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impl Spinor {
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@ -414,6 +418,13 @@ mod implementation {
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xous::MemoryFlags::R | xous::MemoryFlags::W,
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)
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.expect("couldn't map SPINOR soft interrupt CSR range");
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let flusher = xous::syscall::map_memory(
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None,
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None,
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FLUSH_SIZE_BYTES,
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xous::MemoryFlags::R | xous::MemoryFlags::W,
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)
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.expect("couldn't map flusher memory");
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let mut spinor = Spinor {
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id: 0,
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@ -423,6 +434,7 @@ mod implementation {
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susres: RegManager::new(csr.as_mut_ptr() as *mut u32),
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cur_op: None,
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ticktimer: ticktimer_server::Ticktimer::new().unwrap(),
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flusher,
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};
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xous::claim_interrupt(
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@ -473,6 +485,7 @@ mod implementation {
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}
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self.ticktimer.ping_wdt();
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xous::arch::cache_flush(); // flush the CPU caches in case the SPINOR call modified memory that's cached
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self.flush_dcache(0, 4096); // the arch call doesn't use the Vex-specific instruction for cache flush; this one does.
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SPINOR_RESULT.load(Ordering::Relaxed)
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}
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@ -511,7 +524,7 @@ mod implementation {
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".word 0x500F"
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);
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}
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/* manual flushing:
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// augment with manual flushing, because the above instruction didn't seem to do the trick??
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let flush_ptr = self.flusher.as_ptr() as *const u32;
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let mut dummy: u32 = 0;
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// only visit the first word of every line
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@ -519,7 +532,6 @@ mod implementation {
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dummy += unsafe{flush_ptr.add(i).read_volatile()};
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}
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log::trace!("Dcache flush completed: {}", dummy);
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*/
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}
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pub(crate) fn write_region(&mut self, wr: &mut WriteRegion) -> SpinorError {
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@ -549,6 +561,7 @@ mod implementation {
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log::error!("E_FAIL set, erase failed: result 0x{:02x}, sector addr 0x{:08x}", erase_result, wr.start);
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return SpinorError::EraseFailed;
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}
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self.flush_dcache(wr.start, wr.len);
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// now write the data sector
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self.cur_op = Some(FlashOp::WritePages(wr.start, wr.data, wr.len as usize));
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