diff --git a/libs/cramium-hal/Cargo.toml b/libs/cramium-hal/Cargo.toml index aa789ae73..e52077aad 100644 --- a/libs/cramium-hal/Cargo.toml +++ b/libs/cramium-hal/Cargo.toml @@ -39,7 +39,8 @@ board-baosec = [ "utralib/cramium-soc", "ux-api/board-baosec", ] # USB form factor token -loader-baosec = ["camera-ov2640", "display-sh1107", "axp2101", "ux-api"] +loader-baosec = ["camera-ov2640", "display-sh1107", "axp2101", "ux-api/loader-baosec"] +test-baosec = ["ux-api/loader-baosec", "camera-ov2640"] hosted-baosec = [] # emulated hardware on x86 platform board-baosor = [ "camera-ov2640", diff --git a/libs/cramium-hal/src/board/baosec.rs b/libs/cramium-hal/src/board/baosec.rs index 4147103d8..24f38c293 100644 --- a/libs/cramium-hal/src/board/baosec.rs +++ b/libs/cramium-hal/src/board/baosec.rs @@ -112,8 +112,8 @@ pub fn setup_memory_pins(iox: &dyn IoSetup) -> SpimChannel { Some(IoxFunction::AF1), None, None, - Some(IoxEnable::Enable), - Some(IoxDriveStrength::Drive4mA), + Some(IoxEnable::Disable), + Some(IoxDriveStrength::Drive12mA), ); // SPIM_SD[0-3]_A[1] for i in 7..11 { @@ -124,8 +124,8 @@ pub fn setup_memory_pins(iox: &dyn IoSetup) -> SpimChannel { Some(IoxFunction::AF1), None, None, - Some(IoxEnable::Enable), - Some(IoxDriveStrength::Drive2mA), + Some(IoxEnable::Disable), + Some(IoxDriveStrength::Drive8mA), ); } // SPIM_CSN0_A[1] @@ -136,8 +136,8 @@ pub fn setup_memory_pins(iox: &dyn IoSetup) -> SpimChannel { Some(IoxFunction::AF1), None, None, - Some(IoxEnable::Enable), - Some(IoxDriveStrength::Drive2mA), + Some(IoxEnable::Disable), + Some(IoxDriveStrength::Drive8mA), ); // SPIM_CSN1_A[1] iox.setup_pin( @@ -147,8 +147,8 @@ pub fn setup_memory_pins(iox: &dyn IoSetup) -> SpimChannel { Some(IoxFunction::AF1), None, None, - Some(IoxEnable::Enable), - Some(IoxDriveStrength::Drive2mA), + Some(IoxEnable::Disable), + Some(IoxDriveStrength::Drive8mA), ); SpimChannel::Channel1 } diff --git a/libs/cramium-hal/src/board/mod.rs b/libs/cramium-hal/src/board/mod.rs index 7532733c1..4704e6161 100644 --- a/libs/cramium-hal/src/board/mod.rs +++ b/libs/cramium-hal/src/board/mod.rs @@ -1,6 +1,6 @@ -#[cfg(any(feature = "board-baosec", feature = "loader-baosec"))] +#[cfg(any(feature = "board-baosec", feature = "loader-baosec", feature = "test-baosec"))] pub mod baosec; -#[cfg(any(feature = "board-baosec", feature = "loader-baosec"))] +#[cfg(any(feature = "board-baosec", feature = "loader-baosec", feature = "test-baosec"))] pub use baosec::*; #[cfg(any(feature = "board-baosor", feature = "loader-baosor"))] pub mod baosor; diff --git a/libs/ux-api/src/widgets/mod.rs b/libs/ux-api/src/widgets/mod.rs index 88fd83568..d34f08f98 100644 --- a/libs/ux-api/src/widgets/mod.rs +++ b/libs/ux-api/src/widgets/mod.rs @@ -4,6 +4,7 @@ pub mod payload; pub use payload::*; pub mod action; pub use action::*; + pub mod slider; pub use slider::*; pub mod modal; diff --git a/libs/xous-bio-bdma/src/bio_tests/dma.rs b/libs/xous-bio-bdma/src/bio_tests/dma.rs index 73ad8f000..cc5ef302a 100644 --- a/libs/xous-bio-bdma/src/bio_tests/dma.rs +++ b/libs/xous-bio-bdma/src/bio_tests/dma.rs @@ -1,6 +1,7 @@ use core::mem::size_of; use utra::bio_bdma::SFR_CFGINFO; +use utralib::utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE; use crate::*; @@ -84,7 +85,7 @@ pub fn filter_test() -> usize { bio_ss.bio.wo(utra::bio_bdma::SFR_FILTER_BOUNDS_2, (0x6000_0000 - HW_IOX_BASE as u32) >> 12); // with the filters so set, test some transactions that "should" pass - if dma_basic(false) != 4 { + if dma_basic(false, 0) != 4 { passing = false; print!("DMA Filter: allowed transactions are incorrectly blocked"); }; @@ -195,11 +196,11 @@ pub fn filter_test() -> usize { /// /// The `concurrent` flag causes the CPU to do concurrent traffic during the test to /// exercise contention on AXI bus. -pub fn dma_basic(concurrent: bool) -> usize { +pub fn dma_basic(concurrent: bool, clkmode: u8) -> usize { const TEST_LEN: usize = 64; let mut passing = 0; if !concurrent { - print!("DMA basic\r"); + print!("DMA basic2w\r"); } else { print!("DMA cpu+dma concurrent\r"); } @@ -210,7 +211,13 @@ pub fn dma_basic(concurrent: bool) -> usize { let mut bio_ss = BioSharedState::new(); // stop all the machines, so that code can be loaded bio_ss.bio.wo(utra::bio_bdma::SFR_CTRL, 0x0); - bio_ss.load_code(dma_basic_code(), 0, BioCore::Core0); + bio_ss.load_code(dma_basic_code(), 0, BioCore::Core3); + + // setup clocking mode option + bio_ss.bio.rmwf(SFR_CONFIG_CLOCKING_MODE, clkmode as u32); + + // setup clocking mode option + bio_ss.bio.rmwf(SFR_CONFIG_CLOCKING_MODE, clkmode as u32); // These actually "don't matter" because there are no synchronization instructions in the code // Everything runs at "full tilt" @@ -219,7 +226,7 @@ pub fn dma_basic(concurrent: bool) -> usize { bio_ss.bio.wo(utra::bio_bdma::SFR_QDIV2, 0x1_0000); bio_ss.bio.wo(utra::bio_bdma::SFR_QDIV3, 0x1_0000); // start the machine - bio_ss.bio.wo(utra::bio_bdma::SFR_CTRL, 0x111); + bio_ss.bio.wo(utra::bio_bdma::SFR_CTRL, 0x888); let mut main_mem_src: [u32; TEST_LEN] = [0u32; TEST_LEN]; let mut main_mem_dst: [u32; TEST_LEN] = [0u32; TEST_LEN]; @@ -231,19 +238,19 @@ pub fn dma_basic(concurrent: bool) -> usize { unsafe { core::slice::from_raw_parts_mut((utralib::HW_IFRAM1_MEM + 10000) as *mut u32, TEST_LEN) }; ifram_src.fill(0); ifram_dst.fill(0); - passing += basic_u32(&mut bio_ss, &mut main_mem_src, &mut main_mem_dst, 0, "Main->main", concurrent); + passing += basic_u32(&mut bio_ss, &mut main_mem_src, &mut main_mem_dst, 0, "m->m", concurrent); main_mem_src.fill(0); main_mem_dst.fill(0); - passing += basic_u32(&mut bio_ss, ifram_src, &mut main_mem_dst, 0x40, "ifram0->main", concurrent); + passing += basic_u32(&mut bio_ss, ifram_src, &mut main_mem_dst, 0x40, "i0->m", concurrent); ifram_src.fill(0); main_mem_dst.fill(0); - passing += basic_u32(&mut bio_ss, &mut main_mem_src, ifram_dst, 0x80, "Main->ifram1", concurrent); + passing += basic_u32(&mut bio_ss, &mut main_mem_src, ifram_dst, 0x80, "m->i1", concurrent); main_mem_src.fill(0); ifram_dst.fill(0); - passing += basic_u32(&mut bio_ss, ifram_src, ifram_dst, 0xC0, "ifram0->ifram1", concurrent); + passing += basic_u32(&mut bio_ss, ifram_src, ifram_dst, 0xC0, "i0->i1", concurrent); if !concurrent { print!("DMA basic done.\r"); @@ -277,13 +284,32 @@ fn basic_u32( bio_ss.bio.wo(utra::bio_bdma::SFR_TXF0, (src.len() * size_of::()) as u32); // bytes to move while bio_ss.bio.r(utra::bio_bdma::SFR_EVENT_STATUS) & 0x1 == 0 {} cache_flush(); + let mut errs = 0; for (i, &d) in src.iter().enumerate() { let rbk = unsafe { dst.as_ptr().add(i).read_volatile() }; if rbk != d { - print!("{} DMA err @{}, {:x} rbk: {:x}\r", name, i, d, rbk); + if errs < 4 { + unsafe { + print!( + "{} @{:x}/{:x}, {:x} rb:{:x}\r", + name, + src.as_ptr().add(i) as usize, + dst.as_ptr().add(i) as usize, + d, + rbk + ); + } + } else { + print!("x"); + } + errs += 1; pass = 0; } } + if errs > 0 { + print!("\r"); + // errs = 0; + } } else { // this flushes any read data from the cache, so that the CPU copy is forced to fetch // the data from memory @@ -318,12 +344,16 @@ bio_code!(dma_basic_code, DMA_BASIC_START, DMA_BASIC_END, "li x29, 0x1", // clear event done flag - just before the last parameter arrives "mv a1, x16", // wait for # of bytes to move + "sw x0, 0(a2)", // make sure write pipeline is in a good state + "sw x0, 0(a2)", // make sure write pipeline is in a good state + "add a4, a1, a3", // a4 <- end condition based on source address increment "30:", "lw t0, 0(a3)", // blocks until load responds "sw t0, 0(a2)", // blocks until store completes "addi a3, a3, 4", // 3 cycles + "sw t0, 0(a2)", // blocks until store completes "addi a2, a2, 4", // 3 cycles "bne a3, a4, 30b", // 5 cycles "li x28, 0x1", // flip event done flag @@ -539,7 +569,7 @@ bio_code!(dma_u16_code, DMA_U16_START, DMA_U16_END, /// Multi-core DMA copy. More performant, but uses two cores for address generation in /// parallel with the copy master. -pub fn dma_multicore() -> usize { +pub fn dma_multicore(clkmode: u8) -> usize { let mut passing = 0; print!("DMA fast\r"); // clear prior test config state @@ -551,6 +581,9 @@ pub fn dma_multicore() -> usize { // reset all the fifos bio_ss.bio.wo(utra::bio_bdma::SFR_FIFO_CLR, 0xF); + // setup clocking mode option + bio_ss.bio.rmwf(SFR_CONFIG_CLOCKING_MODE, clkmode as u32); + // stop all the machines, so that code can be loaded bio_ss.bio.wo(utra::bio_bdma::SFR_CTRL, 0x0); bio_ss.load_code(dma_mc_copy_code(), 0, BioCore::Core2); @@ -640,7 +673,7 @@ bio_code!(dma_mc_dst_addr_code, DMA_MC_DST_ADDR_START, DMA_MC_DST_ADDR_END, ); /// Attempt to fire off all four engines at once, simultaneously, for maximum bus contention -pub fn dma_coincident() -> usize { +pub fn dma_coincident(clkmode: u8) -> usize { let mut passing = 0; print!("DMA coincident\r"); // clear prior test config state @@ -651,6 +684,9 @@ pub fn dma_coincident() -> usize { // reset all the fifos bio_ss.bio.wo(utra::bio_bdma::SFR_FIFO_CLR, 0xF); + // setup clocking mode option + bio_ss.bio.rmwf(SFR_CONFIG_CLOCKING_MODE, clkmode as u32); + // stop all the machines, so that code can be loaded bio_ss.bio.wo(utra::bio_bdma::SFR_CTRL, 0x0); bio_ss.load_code(dma_coincident_code(), 0, BioCore::Core0); @@ -677,14 +713,14 @@ pub fn dma_coincident() -> usize { ifram_src.fill(0); ifram_dst.fill(0); - passing += coincident_u32(&mut bio_ss, &mut main_mem_src, &mut main_mem_dst, 0x200, "DMA coincident"); - print!("m->m\r"); + passing += coincident_u32(&mut bio_ss, &mut main_mem_src, &mut main_mem_dst, 0x200, "m->m"); + print!("m->m coincident\r"); // try other memory banks - passing += coincident_u32(&mut bio_ss, ifram_src, &mut main_mem_dst, 0x300, "ifram0->main"); + passing += coincident_u32(&mut bio_ss, ifram_src, &mut main_mem_dst, 0x300, "i0->m"); print!("0->m\r"); - passing += coincident_u32(&mut bio_ss, &mut main_mem_src, ifram_dst, 0x400, "main->ifram1"); + passing += coincident_u32(&mut bio_ss, &mut main_mem_src, ifram_dst, 0x400, "m->i1"); print!("m->1\r"); - passing += coincident_u32(&mut bio_ss, ifram_src, ifram_dst, 0x500, "ifram0->ifram1"); + passing += coincident_u32(&mut bio_ss, ifram_src, ifram_dst, 0x500, "i0->i1"); print!("0->1\r"); print!("DMA coincident done.\r"); @@ -712,13 +748,22 @@ fn coincident_u32( while bio_ss.bio.r(utra::bio_bdma::SFR_EVENT_STATUS) & 0xF_0000 != 0xF_0000 {} // one bit per core is set on completion of bits 8:12 cache_flush(); let mut pass = 1; + let mut errs = 0; for (i, &d) in src.iter().enumerate() { let rbk = unsafe { dst.as_ptr().add(i).read_volatile() }; if rbk != d { - print!("{} err @{}, {:x} rbk: {:x}\r", name, i, d, rbk); + if errs < 4 { + print!("{} err @{}, {:x} rbk: {:x}\r", name, i, d, rbk); + } else { + print!("."); + } + errs += 1; pass = 0; } } + if errs >= 4 { + print!("\r"); + } pass } @@ -816,7 +861,7 @@ pub fn dmareq_test() -> usize { bio_ss.bio.wo(utra::bio_bdma::SFR_TXF1, bit as u32); print!("starting search \r"); for i in 1..15 { - print!("search iter {} \r", i); + print!("{}\r", i); // send the bit pattern into the event-set via core 0 bio_ss.bio.wo(utra::bio_bdma::SFR_TXF0, i); diff --git a/libs/xous-bio-bdma/src/bio_tests/spi.rs b/libs/xous-bio-bdma/src/bio_tests/spi.rs index 09f2c9201..ea563b992 100644 --- a/libs/xous-bio-bdma/src/bio_tests/spi.rs +++ b/libs/xous-bio-bdma/src/bio_tests/spi.rs @@ -88,7 +88,9 @@ pub fn spi_test() -> usize { print!("dbg pc 2: {:x}\r", bio_ss.bio.r(utra::bio_bdma::SFR_DBG2)); print!("dbg pc 3: {:x}\r", bio_ss.bio.r(utra::bio_bdma::SFR_DBG3)); for (index, &val) in retvals.iter().enumerate() { - print!("SPI rbk {:x}\r", val); + if index < 4 { + print!("SPI rbk {:x}\r", val); + } // the XOR to 0xAAAA is just a mask we threw in to test immediate loads assert!(val == ((0xAA00 | index as u32) ^ 0xAAAA)); } diff --git a/libs/xous-bio-bdma/src/bio_tests/units.rs b/libs/xous-bio-bdma/src/bio_tests/units.rs index 31673011d..23b1da9c3 100644 --- a/libs/xous-bio-bdma/src/bio_tests/units.rs +++ b/libs/xous-bio-bdma/src/bio_tests/units.rs @@ -318,13 +318,13 @@ pub fn host_fifo_tests() -> usize { // // finally, we're pegged at 15, because, backpressure caused us to miss the rest of // the entries, and we are stuck at the final written value of the output test - print!("rbk: {:x}\r", rbk); + print!("r {:x}\r", rbk); if i <= 9 { assert!(rbk == (0xF1F0_0000 + i)); } else { assert!(rbk == (0xF1F0_0000 + 15)); } - print!("backpressure {:x}\r", rbk); + print!("bp {:x}\r", rbk); } fn get_gpio_via_core(bio_ss: &mut BioSharedState) -> u32 { @@ -390,7 +390,9 @@ pub fn host_fifo_tests() -> usize { // fifo2 should have the entire log of all values in it. make sure that's the case for i in 0..7 { let f2_val = bio_ss.bio.r(utra::bio_bdma::SFR_RXF2); - print!("f2_val {:x}\r", f2_val); + if i > 5 { + print!("f2_val {:x}\r", f2_val); + } assert!(f2_val == 0xf1f0_1000 + i); } let stop_check = bio_ss.bio.r(utra::bio_bdma::SFR_RXF2); @@ -590,7 +592,7 @@ pub fn fifo_level_tests() -> usize { // reset all the fifos bio_ss.bio.wo(utra::bio_bdma::SFR_FIFO_CLR, 0xF); for test_level in 0..FIFO_MAX { - print!("test_level {:x} bank {:x}\r", test_level, bank); + // print!("test_level {:x} bank {:x}\r", test_level, bank); // test eq at level bio_ss.bio.wfo(level, test_level); bio_ss.bio.rmwf(SFR_ETYPE_FIFO_EVENT_EQ_MASK, mask); @@ -886,7 +888,7 @@ pub fn fifo_alias_tests() -> usize { // reset all the fifos bio_ss.bio.wo(utra::bio_bdma::SFR_FIFO_CLR, 0xF); for test_level in 0..FIFO_MAX { - print!("test_level {:x} bank {:x}\r", test_level, bank); + // print!("test_level {:x} bank {:x}\r", test_level, bank); // test eq at level bio_ss.bio.wfo(level, test_level); bio_ss.bio.rmwf(SFR_ETYPE_FIFO_EVENT_EQ_MASK, mask); @@ -1106,7 +1108,7 @@ pub fn event_aliases() -> usize { let mut passing = 1; for (i, config) in event_test_configs.iter_mut().enumerate() { - print!(" Checking bank {}...\r", i); + print!(" bnk{}\r", i); for _ in 0..3 { // clear all events bio_ss.bio.wfo(utra::bio_bdma::SFR_EVENT_CLR_SFR_EVENT_CLR, 0xFFFF_FF); diff --git a/utralib/cramium/core.svd b/utralib/cramium/core.svd index f8233d5cd..0637e1066 100644 --- a/utralib/cramium/core.svd +++ b/utralib/cramium/core.svd @@ -3,7 +3,7 @@ litex SOC - + 8 32 diff --git a/utralib/cramium/daric.svd b/utralib/cramium/daric.svd index cf372059d..032e69c0b 100644 --- a/utralib/cramium/daric.svd +++ b/utralib/cramium/daric.svd @@ -552,6 +552,14 @@ bit position to clear the flag]]> + + aluinvld + 5 + [5:5] + 5 + + @@ -1054,6 +1062,14 @@ bit position to clear the flag]]> [5:5] 5 + + + chkfail + 6 + [6:6] + 6 + @@ -1109,6 +1125,20 @@ bit position to clear the flag]]> 3 + + tsmode + 4 + [4:4] + 4 + + + + cr_opt_ifskey + 5 + [5:5] + 5 + + @@ -1239,10 +1269,26 @@ bit position to clear the flag]]> + + SFR_KEYIDX + + 0x0060 + 0x00 + 32 + + + sfr_keyidx + 9 + [9:0] + 0 + + + + 0 - 0x40 + 0x64 registers @@ -1371,8 +1417,8 @@ bit position to clear the flag]]> sfr_optnw - 12 - [12:0] + 13 + [13:0] 0 @@ -1387,8 +1433,8 @@ bit position to clear the flag]]> sfr_optew - 12 - [12:0] + 13 + [13:0] 0 @@ -1538,10 +1584,74 @@ bit position to clear the flag]]> + + SFR_TICKCYC + + 0x0050 + 0x00 + 32 + + + sfr_tickcyc + 7 + [7:0] + 0 + + + + + + SFR_TICKCNT + + 0x0054 + 0x00 + 32 + + + sfr_tickcnt + 31 + [31:0] + 0 + + + + + + SFR_MASKSEED + + 0x0060 + 0x00 + 32 + + + sfr_maskseed + 31 + [31:0] + 0 + + + + + + SFR_MASKSEEDAR + + 0x0064 + 0x00 + 32 + + + sfr_maskseedar + 31 + [31:0] + 0 + + + + 0 - 0x44 + 0x68 registers @@ -1655,8 +1765,8 @@ bit position to clear the flag]]> sfr_fr - 1 - [1:0] + 2 + [2:0] 0 @@ -1795,11 +1905,11 @@ position to clear the flag]]> 32 - sfr_xch_func + xchcr_func 0 [0:0] 0 - + @@ -1811,11 +1921,11 @@ position to clear the flag]]> 32 - sfr_xch_opt - 7 - [7:0] + xchcr_opt + 9 + [9:0] 0 - + @@ -1827,11 +1937,11 @@ position to clear the flag]]> 32 - sfr_xch_axstart + xchcr_axstart 31 [31:0] 0 - + @@ -1843,11 +1953,11 @@ position to clear the flag]]> 32 - sfr_xch_segid + xchcr_segid 7 [7:0] 0 - + @@ -1891,11 +2001,11 @@ position to clear the flag]]> 32 - sfr_sch_func + schcr_func 0 [0:0] 0 - + @@ -1907,11 +2017,11 @@ position to clear the flag]]> 32 - sfr_sch_opt - 7 - [7:0] + schcr_opt + 9 + [9:0] 0 - + @@ -1923,11 +2033,11 @@ position to clear the flag]]> 32 - sfr_sch_axstart + schcr_axstart 31 [31:0] 0 - + @@ -1939,11 +2049,11 @@ position to clear the flag]]> 32 - sfr_sch_segid + schcr_segid 7 [7:0] 0 - + @@ -2059,10 +2169,42 @@ position to clear the flag]]> + + SFR_WDATABYPASS_MODE + + 0x0070 + 0x00 + 32 + + + sfr_wdatabypass_mode + 1 + [1:0] + 0 + + + + + + SFR_WDATABYPASS_DATA + + 0x0074 + 0x00 + 32 + + + sfr_wdatabypass_data + 31 + [31:0] + 0 + + + + 0 - 0x64 + 0x78 registers @@ -2071,22 +2213,6 @@ position to clear the flag]]> 0x40028000 SCE_GLBSFR - - SFR_SCEMODE - - 0x0000 - 0x00 - 32 - - - cr_scemode - 1 - [1:0] - 0 - - - - SFR_SUBEN @@ -2363,25 +2489,73 @@ bit position to clear the flag]]> - SFR_TS + SFR_TS_SR_TS0 - 0x00fc + 0x00e0 0x00 32 - cr_ts - 15 - [15:0] + sr_ts0 + 31 + [31:0] 0 - + + + + + + SFR_TS_SR_TS1 + + 0x00e4 + 0x00 + 32 + + + sr_ts1 + 31 + [31:0] + 0 + + + + + + SFR_TS_SR_TS2 + + 0x00e8 + 0x00 + 32 + + + sr_ts2 + 31 + [31:0] + 0 + + + + + + SFR_TS_SR_TS3 + + 0x00ec + 0x00 + 32 + + + sr_ts3 + 31 + [31:0] + 0 + 0 - 0x100 + 0xf0 registers @@ -2712,18 +2886,18 @@ position to clear the flag]]> - SFR_PWMEVSEL + SFR_TMREVEN 0x0034 0x00 32 - pwm_evsel - 31 - [31:0] + sfr_tmreven + 1 + [1:0] 0 - + @@ -2889,10 +3063,106 @@ position to clear the flag]]> + + SFR_CM7ERRCR + + 0x0084 + 0x00 + 32 + + + erren + 31 + [31:0] + 0 + + + + + + SFR_RRCEVSEL_RRC_EVSEL0 + + 0x0090 + 0x00 + 32 + + + rrc_evsel0 + 31 + [31:0] + 0 + + + + + + SFR_RRCEVSEL_RRC_EVSEL1 + + 0x0094 + 0x00 + 32 + + + rrc_evsel1 + 31 + [31:0] + 0 + + + + + + SFR_RRCEVSEL_RRC_EVSEL2 + + 0x0098 + 0x00 + 32 + + + rrc_evsel2 + 31 + [31:0] + 0 + + + + + + SFR_RRCEVSEL_RRC_EVSEL3 + + 0x009c + 0x00 + 32 + + + rrc_evsel3 + 31 + [31:0] + 0 + + + + + + SFR_RRCEVEN + + 0x00a0 + 0x00 + 32 + + + rrc_even + 15 + [15:0] + 0 + + + + 0 - 0x84 + 0xa4 registers @@ -2990,8 +3260,8 @@ position to clear the flag]]> cfgfdcr_0_4_0 - 23 - [23:0] + 31 + [31:0] 0 @@ -3006,8 +3276,8 @@ position to clear the flag]]> cfgfdcr_0_4_1 - 23 - [23:0] + 31 + [31:0] 0 @@ -3022,8 +3292,8 @@ position to clear the flag]]> cfgfdcr_0_4_2 - 23 - [23:0] + 31 + [31:0] 0 @@ -3038,8 +3308,8 @@ position to clear the flag]]> cfgfdcr_0_4_3 - 23 - [23:0] + 31 + [31:0] 0 @@ -3054,8 +3324,8 @@ position to clear the flag]]> cfgfdcr_0_4_4 - 23 - [23:0] + 31 + [31:0] 0 @@ -3070,8 +3340,8 @@ position to clear the flag]]> cfgfdcr - 23 - [23:0] + 31 + [31:0] 0 @@ -3150,8 +3420,8 @@ position to clear the flag]]> sfr_cgufdper - 23 - [23:0] + 31 + [31:0] 0 @@ -3166,8 +3436,8 @@ position to clear the flag]]> fsfreq0 - 15 - [15:0] + 31 + [31:0] 0 @@ -3182,8 +3452,8 @@ position to clear the flag]]> fsfreq1 - 15 - [15:0] + 31 + [31:0] 0 @@ -3198,8 +3468,8 @@ position to clear the flag]]> fsfreq2 - 15 - [15:0] + 31 + [31:0] 0 @@ -3214,8 +3484,8 @@ position to clear the flag]]> fsfreq3 - 15 - [15:0] + 31 + [31:0] 0 @@ -3230,8 +3500,8 @@ position to clear the flag]]> sfr_cgufsvld - 3 - [3:0] + 7 + [7:0] 0 @@ -3261,11 +3531,11 @@ position to clear the flag]]> 32 - sfr_aclkgr + aclksubgate 7 [7:0] 0 - + @@ -3277,11 +3547,11 @@ position to clear the flag]]> 32 - sfr_hclkgr + hclksubgate 7 [7:0] 0 - + @@ -3293,11 +3563,11 @@ position to clear the flag]]> 32 - sfr_iclkgr + iclksubgate 7 [7:0] 0 - + @@ -3309,11 +3579,11 @@ position to clear the flag]]> 32 - sfr_pclkgr + pclksubgate 7 [7:0] 0 - + @@ -3627,6 +3897,13 @@ respective bit position to clear the flag]]> 7 + + clocking_mode + 9 + [9:8] + 8 + + @@ -8948,10 +9225,26 @@ respective bit position to clear the flag]]> + + SFR_RAMSEC + + 0x0030 + 0x00 + 32 + + + ramsec + 3 + [3:0] + 0 + + + + 0 - 0x24 + 0x34 registers @@ -9728,8 +10021,8 @@ respective bit position to clear the flag]]> sfr_rrccr - 1 - [1:0] + 31 + [31:0] 0 @@ -9776,30 +10069,14 @@ respective bit position to clear the flag]]> sfr_rrcfr - 3 - [3:0] + 4 + [4:0] 0 - - SFR_RRCAR - - 0x0010 - 0x00 - 32 - - - sfr_rrcar - 31 - [31:0] - 0 - - - - SFR_RRCSR_SET0 @@ -9896,10 +10173,26 @@ bit position to clear the flag]]> + + SFR_RRCAR + + 0x00f0 + 0x00 + 32 + + + sfr_rrcar + 31 + [31:0] + 0 + + + + 0 - 0x2c + 0xf4 registers @@ -9909,14 +10202,14 @@ bit position to clear the flag]]> GLUECHAIN - SFR_GCMASK + SFR_GCMASK_CR_GCMASK0 0x0000 0x00 32 - cr_gcmask + cr_gcmask0 31 [31:0] 0 @@ -9925,14 +10218,14 @@ bit position to clear the flag]]> - SFR_GCSR + SFR_GCSR_GLUEREG0 0x0004 0x00 32 - gluereg + gluereg0 31 [31:0] 0 @@ -9941,14 +10234,14 @@ bit position to clear the flag]]> - SFR_GCRST + SFR_GCRST_GLUERST0 0x0008 0x00 32 - gluerst + gluerst0 31 [31:0] 0 @@ -9957,14 +10250,14 @@ bit position to clear the flag]]> - SFR_GCTEST + SFR_GCTEST_GLUETEST0 0x000c 0x00 32 - gluetest + gluetest0 31 [31:0] 0 @@ -10080,74 +10373,10 @@ bit position to clear the flag]]> - - SFR_MLSR_SR_MLSR4 - - 0x0018 - 0x00 - 32 - - - sr_mlsr4 - 31 - [31:0] - 0 - - - - - - SFR_MLSR_SR_MLSR5 - - 0x001c - 0x00 - 32 - - - sr_mlsr5 - 31 - [31:0] - 0 - - - - - - SFR_MLSR_SR_MLSR6 - - 0x0020 - 0x00 - 32 - - - sr_mlsr6 - 31 - [31:0] - 0 - - - - - - SFR_MLSR_SR_MLSR7 - - 0x0024 - 0x00 - 32 - - - sr_mlsr7 - 31 - [31:0] - 0 - - - - 0 - 0x28 + 0x18 registers @@ -10406,8 +10635,8 @@ position to clear the flag]]> vdena - 3 - [3:0] + 5 + [5:0] 0 @@ -10614,18 +10843,32 @@ position to clear the flag]]> AO_SYSCTRL - CR_CLK32KSEL + CR_CR 0x0000 0x00 32 - cr_clk32ksel + clk32kselreg 0 [0:0] 0 - + + + + pdisoen + 1 + [1:1] + 1 + + + + pclkicg + 2 + [2:2] + 2 + @@ -10685,18 +10928,18 @@ position to clear the flag]]> - SFR_PMUCR + SFR_PMUCSR 0x0010 0x00 32 - sfrpmucr + pmucrreg 7 [7:0] 0 - + @@ -10733,50 +10976,50 @@ position to clear the flag]]> - SFR_PMUDFT + SFR_PMUDFTSR 0x001c 0x00 32 - sfrpmudft + pmudftreg 5 [5:0] 0 - + - SFR_PMUTRM0 + SFR_PMUTRM0CSR 0x0020 0x00 32 - sfrpmutrm + pmutrmreg 31 [31:0] 0 - + - SFR_PMUTRM1 + SFR_PMUTRM1CSR 0x0024 0x00 32 - sfrpmutrm + pmutrmreg 1 [1:0] 0 - + @@ -10954,10 +11197,26 @@ bit position to clear the flag]]> + + SFR_AOPADPU + + 0x0064 + 0x00 + 32 + + + sfr_aopadpu + 9 + [9:0] + 0 + + + + 0 - 0x64 + 0x68 registers @@ -17511,12 +17770,12 @@ bit position to clear the flag]]> SEG_PIB 0x40020C00 - 0x00000400 + 0x00000800 SEG_PSIB - 0x40021000 - 0x00000400 + 0x40021400 + 0x00000000 SEG_POB diff --git a/utralib/src/generated/cramium_soc.rs b/utralib/src/generated/cramium_soc.rs index 7325a95fd..fcdb9812c 100644 --- a/utralib/src/generated/cramium_soc.rs +++ b/utralib/src/generated/cramium_soc.rs @@ -285,9 +285,9 @@ pub const HW_SEG_PCON_MEM_LEN: usize = 0; pub const HW_SEG_PKB_MEM: usize = 0x40020800; pub const HW_SEG_PKB_MEM_LEN: usize = 1024; pub const HW_SEG_PIB_MEM: usize = 0x40020c00; -pub const HW_SEG_PIB_MEM_LEN: usize = 1024; -pub const HW_SEG_PSIB_MEM: usize = 0x40021000; -pub const HW_SEG_PSIB_MEM_LEN: usize = 1024; +pub const HW_SEG_PIB_MEM_LEN: usize = 2048; +pub const HW_SEG_PSIB_MEM: usize = 0x40021400; +pub const HW_SEG_PSIB_MEM_LEN: usize = 0; pub const HW_SEG_POB_MEM: usize = 0x40021400; pub const HW_SEG_POB_MEM_LEN: usize = 1024; pub const HW_SEG_PSOB_MEM: usize = 0x40021800; @@ -2195,12 +2195,13 @@ pub mod utra { pub const SFR_SRMFSM_MFSM: crate::Field = crate::Field::new(8, 0, SFR_SRMFSM); pub const SFR_SRMFSM_CRREG: crate::Field = crate::Field::new(1, 8, SFR_SRMFSM); - pub const SFR_FR: crate::Register = crate::Register::new(3, 0x1f); + pub const SFR_FR: crate::Register = crate::Register::new(3, 0x3f); pub const SFR_FR_MFSM_DONE: crate::Field = crate::Field::new(1, 0, SFR_FR); pub const SFR_FR_DIV_DONE: crate::Field = crate::Field::new(1, 1, SFR_FR); pub const SFR_FR_CHNLO_DONE: crate::Field = crate::Field::new(1, 2, SFR_FR); pub const SFR_FR_CHNLI_DONE: crate::Field = crate::Field::new(1, 3, SFR_FR); pub const SFR_FR_QS0ERR: crate::Field = crate::Field::new(1, 4, SFR_FR); + pub const SFR_FR_ALUINVLD: crate::Field = crate::Field::new(1, 5, SFR_FR); pub const SFR_CRDIVLEN: crate::Register = crate::Register::new(4, 0xffff); pub const SFR_CRDIVLEN_SFR_CRDIVLEN: crate::Field = crate::Field::new(16, 0, SFR_CRDIVLEN); @@ -2280,7 +2281,7 @@ pub mod utra { } pub mod combohash { - pub const COMBOHASH_NUMREGS: usize = 14; + pub const COMBOHASH_NUMREGS: usize = 15; pub const SFR_CRFUNC: crate::Register = crate::Register::new(0, 0xff); pub const SFR_CRFUNC_CR_FUNC: crate::Field = crate::Field::new(8, 0, SFR_CRFUNC); @@ -2291,22 +2292,25 @@ pub mod utra { pub const SFR_SRMFSM: crate::Register = crate::Register::new(2, 0xff); pub const SFR_SRMFSM_MFSM: crate::Field = crate::Field::new(8, 0, SFR_SRMFSM); - pub const SFR_FR: crate::Register = crate::Register::new(3, 0x3f); + pub const SFR_FR: crate::Register = crate::Register::new(3, 0x7f); pub const SFR_FR_MFSM_DONE: crate::Field = crate::Field::new(1, 0, SFR_FR); pub const SFR_FR_HASH_DONE: crate::Field = crate::Field::new(1, 1, SFR_FR); pub const SFR_FR_CHNLO_DONE: crate::Field = crate::Field::new(1, 2, SFR_FR); pub const SFR_FR_CHNLI_DONE: crate::Field = crate::Field::new(1, 3, SFR_FR); pub const SFR_FR_CHKDONE: crate::Field = crate::Field::new(1, 4, SFR_FR); pub const SFR_FR_CHKPASS: crate::Field = crate::Field::new(1, 5, SFR_FR); + pub const SFR_FR_CHKFAIL: crate::Field = crate::Field::new(1, 6, SFR_FR); pub const SFR_OPT1: crate::Register = crate::Register::new(4, 0xffff); pub const SFR_OPT1_CR_OPT_HASHCNT: crate::Field = crate::Field::new(16, 0, SFR_OPT1); - pub const SFR_OPT2: crate::Register = crate::Register::new(5, 0xf); + pub const SFR_OPT2: crate::Register = crate::Register::new(5, 0x3f); pub const SFR_OPT2_CR_OPT_SCRTCHK: crate::Field = crate::Field::new(1, 0, SFR_OPT2); pub const SFR_OPT2_CR_OPT_IFSOB: crate::Field = crate::Field::new(1, 1, SFR_OPT2); pub const SFR_OPT2_CR_OPT_IFSTART: crate::Field = crate::Field::new(1, 2, SFR_OPT2); pub const SFR_OPT2_OPT_SCHNR1_0: crate::Field = crate::Field::new(1, 3, SFR_OPT2); + pub const SFR_OPT2_TSMODE: crate::Field = crate::Field::new(1, 4, SFR_OPT2); + pub const SFR_OPT2_CR_OPT_IFSKEY: crate::Field = crate::Field::new(1, 5, SFR_OPT2); pub const SFR_OPT3: crate::Register = crate::Register::new(6, 0xff); pub const SFR_OPT3_SFR_OPT3: crate::Field = crate::Field::new(8, 0, SFR_OPT3); @@ -2332,11 +2336,14 @@ pub mod utra { pub const SFR_SEGPTR_SEGID_HOUT2: crate::Register = crate::Register::new(15, 0xfff); pub const SFR_SEGPTR_SEGID_HOUT2_SEGID_HOUT2: crate::Field = crate::Field::new(12, 0, SFR_SEGPTR_SEGID_HOUT2); + pub const SFR_KEYIDX: crate::Register = crate::Register::new(24, 0x3ff); + pub const SFR_KEYIDX_SFR_KEYIDX: crate::Field = crate::Field::new(10, 0, SFR_KEYIDX); + pub const HW_COMBOHASH_BASE: usize = 0x4002b000; } pub mod pke { - pub const PKE_NUMREGS: usize = 15; + pub const PKE_NUMREGS: usize = 19; pub const SFR_CRFUNC: crate::Register = crate::Register::new(0, 0xffff); pub const SFR_CRFUNC_CR_FUNC: crate::Field = crate::Field::new(8, 0, SFR_CRFUNC); @@ -2356,11 +2363,11 @@ pub mod utra { pub const SFR_FR_CHNLI_DONE: crate::Field = crate::Field::new(1, 3, SFR_FR); pub const SFR_FR_CHNLX_DONE: crate::Field = crate::Field::new(1, 4, SFR_FR); - pub const SFR_OPTNW: crate::Register = crate::Register::new(4, 0x1fff); - pub const SFR_OPTNW_SFR_OPTNW: crate::Field = crate::Field::new(13, 0, SFR_OPTNW); + pub const SFR_OPTNW: crate::Register = crate::Register::new(4, 0x3fff); + pub const SFR_OPTNW_SFR_OPTNW: crate::Field = crate::Field::new(14, 0, SFR_OPTNW); - pub const SFR_OPTEW: crate::Register = crate::Register::new(5, 0x1fff); - pub const SFR_OPTEW_SFR_OPTEW: crate::Field = crate::Field::new(13, 0, SFR_OPTEW); + pub const SFR_OPTEW: crate::Register = crate::Register::new(5, 0x3fff); + pub const SFR_OPTEW_SFR_OPTEW: crate::Field = crate::Field::new(14, 0, SFR_OPTEW); pub const SFR_OPTRW: crate::Register = crate::Register::new(6, 0x3ff); pub const SFR_OPTRW_SFR_OPTRW: crate::Field = crate::Field::new(10, 0, SFR_OPTRW); @@ -2389,6 +2396,18 @@ pub mod utra { pub const SFR_SEGPTR_PTRID_POB: crate::Register = crate::Register::new(16, 0xfff); pub const SFR_SEGPTR_PTRID_POB_PTRID_POB: crate::Field = crate::Field::new(12, 0, SFR_SEGPTR_PTRID_POB); + pub const SFR_TICKCYC: crate::Register = crate::Register::new(20, 0xff); + pub const SFR_TICKCYC_SFR_TICKCYC: crate::Field = crate::Field::new(8, 0, SFR_TICKCYC); + + pub const SFR_TICKCNT: crate::Register = crate::Register::new(21, 0xffffffff); + pub const SFR_TICKCNT_SFR_TICKCNT: crate::Field = crate::Field::new(32, 0, SFR_TICKCNT); + + pub const SFR_MASKSEED: crate::Register = crate::Register::new(24, 0xffffffff); + pub const SFR_MASKSEED_SFR_MASKSEED: crate::Field = crate::Field::new(32, 0, SFR_MASKSEED); + + pub const SFR_MASKSEEDAR: crate::Register = crate::Register::new(25, 0xffffffff); + pub const SFR_MASKSEEDAR_SFR_MASKSEEDAR: crate::Field = crate::Field::new(32, 0, SFR_MASKSEEDAR); + pub const HW_PKE_BASE: usize = 0x4002c000; } @@ -2413,8 +2432,8 @@ pub mod utra { pub const SFR_AR_GEN: crate::Register = crate::Register::new(5, 0xffffffff); pub const SFR_AR_GEN_SFR_AR_GEN: crate::Field = crate::Field::new(32, 0, SFR_AR_GEN); - pub const SFR_FR: crate::Register = crate::Register::new(6, 0x3); - pub const SFR_FR_SFR_FR: crate::Field = crate::Field::new(2, 0, SFR_FR); + pub const SFR_FR: crate::Register = crate::Register::new(6, 0x7); + pub const SFR_FR_SFR_FR: crate::Field = crate::Field::new(3, 0, SFR_FR); pub const SFR_DRPSZ: crate::Register = crate::Register::new(8, 0xffffffff); pub const SFR_DRPSZ_SFR_DRPSZ: crate::Field = crate::Field::new(32, 0, SFR_DRPSZ); @@ -2438,22 +2457,22 @@ pub mod utra { } pub mod scedma { - pub const SCEDMA_NUMREGS: usize = 18; + pub const SCEDMA_NUMREGS: usize = 20; pub const SFR_SCHSTART_AR: crate::Register = crate::Register::new(0, 0xffffffff); pub const SFR_SCHSTART_AR_SFR_SCHSTART_AR: crate::Field = crate::Field::new(32, 0, SFR_SCHSTART_AR); pub const SFR_XCH_FUNC: crate::Register = crate::Register::new(4, 0x1); - pub const SFR_XCH_FUNC_SFR_XCH_FUNC: crate::Field = crate::Field::new(1, 0, SFR_XCH_FUNC); + pub const SFR_XCH_FUNC_XCHCR_FUNC: crate::Field = crate::Field::new(1, 0, SFR_XCH_FUNC); - pub const SFR_XCH_OPT: crate::Register = crate::Register::new(5, 0xff); - pub const SFR_XCH_OPT_SFR_XCH_OPT: crate::Field = crate::Field::new(8, 0, SFR_XCH_OPT); + pub const SFR_XCH_OPT: crate::Register = crate::Register::new(5, 0x3ff); + pub const SFR_XCH_OPT_XCHCR_OPT: crate::Field = crate::Field::new(10, 0, SFR_XCH_OPT); pub const SFR_XCH_AXSTART: crate::Register = crate::Register::new(6, 0xffffffff); - pub const SFR_XCH_AXSTART_SFR_XCH_AXSTART: crate::Field = crate::Field::new(32, 0, SFR_XCH_AXSTART); + pub const SFR_XCH_AXSTART_XCHCR_AXSTART: crate::Field = crate::Field::new(32, 0, SFR_XCH_AXSTART); pub const SFR_XCH_SEGID: crate::Register = crate::Register::new(7, 0xff); - pub const SFR_XCH_SEGID_SFR_XCH_SEGID: crate::Field = crate::Field::new(8, 0, SFR_XCH_SEGID); + pub const SFR_XCH_SEGID_XCHCR_SEGID: crate::Field = crate::Field::new(8, 0, SFR_XCH_SEGID); pub const SFR_XCH_SEGSTART: crate::Register = crate::Register::new(8, 0xfff); pub const SFR_XCH_SEGSTART_XCHCR_SEGSTART: crate::Field = crate::Field::new(12, 0, SFR_XCH_SEGSTART); @@ -2462,16 +2481,16 @@ pub mod utra { pub const SFR_XCH_TRANSIZE_XCHCR_TRANSIZE: crate::Field = crate::Field::new(30, 0, SFR_XCH_TRANSIZE); pub const SFR_SCH_FUNC: crate::Register = crate::Register::new(12, 0x1); - pub const SFR_SCH_FUNC_SFR_SCH_FUNC: crate::Field = crate::Field::new(1, 0, SFR_SCH_FUNC); + pub const SFR_SCH_FUNC_SCHCR_FUNC: crate::Field = crate::Field::new(1, 0, SFR_SCH_FUNC); - pub const SFR_SCH_OPT: crate::Register = crate::Register::new(13, 0xff); - pub const SFR_SCH_OPT_SFR_SCH_OPT: crate::Field = crate::Field::new(8, 0, SFR_SCH_OPT); + pub const SFR_SCH_OPT: crate::Register = crate::Register::new(13, 0x3ff); + pub const SFR_SCH_OPT_SCHCR_OPT: crate::Field = crate::Field::new(10, 0, SFR_SCH_OPT); pub const SFR_SCH_AXSTART: crate::Register = crate::Register::new(14, 0xffffffff); - pub const SFR_SCH_AXSTART_SFR_SCH_AXSTART: crate::Field = crate::Field::new(32, 0, SFR_SCH_AXSTART); + pub const SFR_SCH_AXSTART_SCHCR_AXSTART: crate::Field = crate::Field::new(32, 0, SFR_SCH_AXSTART); pub const SFR_SCH_SEGID: crate::Register = crate::Register::new(15, 0xff); - pub const SFR_SCH_SEGID_SFR_SCH_SEGID: crate::Field = crate::Field::new(8, 0, SFR_SCH_SEGID); + pub const SFR_SCH_SEGID_SCHCR_SEGID: crate::Field = crate::Field::new(8, 0, SFR_SCH_SEGID); pub const SFR_SCH_SEGSTART: crate::Register = crate::Register::new(16, 0xfff); pub const SFR_SCH_SEGSTART_SCHCR_SEGSTART: crate::Field = crate::Field::new(12, 0, SFR_SCH_SEGSTART); @@ -2494,14 +2513,17 @@ pub mod utra { pub const SFR_ICH_TRANSIZE: crate::Register = crate::Register::new(24, 0xfff); pub const SFR_ICH_TRANSIZE_ICHCR_TRANSIZE: crate::Field = crate::Field::new(12, 0, SFR_ICH_TRANSIZE); + pub const SFR_WDATABYPASS_MODE: crate::Register = crate::Register::new(28, 0x3); + pub const SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE: crate::Field = crate::Field::new(2, 0, SFR_WDATABYPASS_MODE); + + pub const SFR_WDATABYPASS_DATA: crate::Register = crate::Register::new(29, 0xffffffff); + pub const SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA: crate::Field = crate::Field::new(32, 0, SFR_WDATABYPASS_DATA); + pub const HW_SCEDMA_BASE: usize = 0x40029000; } pub mod sce_glbsfr { - pub const SCE_GLBSFR_NUMREGS: usize = 19; - - pub const SFR_SCEMODE: crate::Register = crate::Register::new(0, 0x3); - pub const SFR_SCEMODE_CR_SCEMODE: crate::Field = crate::Field::new(2, 0, SFR_SCEMODE); + pub const SCE_GLBSFR_NUMREGS: usize = 21; pub const SFR_SUBEN: crate::Register = crate::Register::new(1, 0xffff); pub const SFR_SUBEN_CR_SUBEN: crate::Field = crate::Field::new(16, 0, SFR_SUBEN); @@ -2554,8 +2576,17 @@ pub mod utra { pub const SFR_FRACERR: crate::Register = crate::Register::new(24, 0xff); pub const SFR_FRACERR_FR_ACERR: crate::Field = crate::Field::new(8, 0, SFR_FRACERR); - pub const SFR_TS: crate::Register = crate::Register::new(63, 0xffff); - pub const SFR_TS_CR_TS: crate::Field = crate::Field::new(16, 0, SFR_TS); + pub const SFR_TS_SR_TS0: crate::Register = crate::Register::new(56, 0xffffffff); + pub const SFR_TS_SR_TS0_SR_TS0: crate::Field = crate::Field::new(32, 0, SFR_TS_SR_TS0); + + pub const SFR_TS_SR_TS1: crate::Register = crate::Register::new(57, 0xffffffff); + pub const SFR_TS_SR_TS1_SR_TS1: crate::Field = crate::Field::new(32, 0, SFR_TS_SR_TS1); + + pub const SFR_TS_SR_TS2: crate::Register = crate::Register::new(58, 0xffffffff); + pub const SFR_TS_SR_TS2_SR_TS2: crate::Field = crate::Field::new(32, 0, SFR_TS_SR_TS2); + + pub const SFR_TS_SR_TS3: crate::Register = crate::Register::new(59, 0xffffffff); + pub const SFR_TS_SR_TS3_SR_TS3: crate::Field = crate::Field::new(32, 0, SFR_TS_SR_TS3); pub const HW_SCE_GLBSFR_BASE: usize = 0x40028000; } @@ -2603,7 +2634,7 @@ pub mod utra { } pub mod evc { - pub const EVC_NUMREGS: usize = 22; + pub const EVC_NUMREGS: usize = 28; pub const SFR_CM7EVSEL_CM7EVSEL0: crate::Register = crate::Register::new(0, 0xff); pub const SFR_CM7EVSEL_CM7EVSEL0_CM7EVSEL0: crate::Field = crate::Field::new(8, 0, SFR_CM7EVSEL_CM7EVSEL0); @@ -2638,8 +2669,8 @@ pub mod utra { pub const SFR_TMREVSEL: crate::Register = crate::Register::new(12, 0xffff); pub const SFR_TMREVSEL_TMR_EVSEL: crate::Field = crate::Field::new(16, 0, SFR_TMREVSEL); - pub const SFR_PWMEVSEL: crate::Register = crate::Register::new(13, 0xffffffff); - pub const SFR_PWMEVSEL_PWM_EVSEL: crate::Field = crate::Field::new(32, 0, SFR_PWMEVSEL); + pub const SFR_TMREVEN: crate::Register = crate::Register::new(13, 0x3); + pub const SFR_TMREVEN_SFR_TMREVEN: crate::Field = crate::Field::new(2, 0, SFR_TMREVEN); pub const SFR_IFEVEN_IFEVEN0: crate::Register = crate::Register::new(16, 0xffffffff); pub const SFR_IFEVEN_IFEVEN0_IFEVEN0: crate::Field = crate::Field::new(32, 0, SFR_IFEVEN_IFEVEN0); @@ -2671,6 +2702,24 @@ pub mod utra { pub const SFR_CM7ERRFR: crate::Register = crate::Register::new(32, 0xffffffff); pub const SFR_CM7ERRFR_ERRIN: crate::Field = crate::Field::new(32, 0, SFR_CM7ERRFR); + pub const SFR_CM7ERRCR: crate::Register = crate::Register::new(33, 0xffffffff); + pub const SFR_CM7ERRCR_ERREN: crate::Field = crate::Field::new(32, 0, SFR_CM7ERRCR); + + pub const SFR_RRCEVSEL_RRC_EVSEL0: crate::Register = crate::Register::new(36, 0xffffffff); + pub const SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0: crate::Field = crate::Field::new(32, 0, SFR_RRCEVSEL_RRC_EVSEL0); + + pub const SFR_RRCEVSEL_RRC_EVSEL1: crate::Register = crate::Register::new(37, 0xffffffff); + pub const SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1: crate::Field = crate::Field::new(32, 0, SFR_RRCEVSEL_RRC_EVSEL1); + + pub const SFR_RRCEVSEL_RRC_EVSEL2: crate::Register = crate::Register::new(38, 0xffffffff); + pub const SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2: crate::Field = crate::Field::new(32, 0, SFR_RRCEVSEL_RRC_EVSEL2); + + pub const SFR_RRCEVSEL_RRC_EVSEL3: crate::Register = crate::Register::new(39, 0xffffffff); + pub const SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3: crate::Field = crate::Field::new(32, 0, SFR_RRCEVSEL_RRC_EVSEL3); + + pub const SFR_RRCEVEN: crate::Register = crate::Register::new(40, 0xffff); + pub const SFR_RRCEVEN_RRC_EVEN: crate::Field = crate::Field::new(16, 0, SFR_RRCEVEN); + pub const HW_EVC_BASE: usize = 0x40044000; } @@ -2692,23 +2741,23 @@ pub mod utra { pub const SFR_CGUSEL0: crate::Register = crate::Register::new(4, 0x3); pub const SFR_CGUSEL0_SFR_CGUSEL0: crate::Field = crate::Field::new(2, 0, SFR_CGUSEL0); - pub const SFR_CGUFD_CFGFDCR_0_4_0: crate::Register = crate::Register::new(5, 0xffffff); - pub const SFR_CGUFD_CFGFDCR_0_4_0_CFGFDCR_0_4_0: crate::Field = crate::Field::new(24, 0, SFR_CGUFD_CFGFDCR_0_4_0); + pub const SFR_CGUFD_CFGFDCR_0_4_0: crate::Register = crate::Register::new(5, 0xffffffff); + pub const SFR_CGUFD_CFGFDCR_0_4_0_CFGFDCR_0_4_0: crate::Field = crate::Field::new(32, 0, SFR_CGUFD_CFGFDCR_0_4_0); - pub const SFR_CGUFD_CFGFDCR_0_4_1: crate::Register = crate::Register::new(6, 0xffffff); - pub const SFR_CGUFD_CFGFDCR_0_4_1_CFGFDCR_0_4_1: crate::Field = crate::Field::new(24, 0, SFR_CGUFD_CFGFDCR_0_4_1); + pub const SFR_CGUFD_CFGFDCR_0_4_1: crate::Register = crate::Register::new(6, 0xffffffff); + pub const SFR_CGUFD_CFGFDCR_0_4_1_CFGFDCR_0_4_1: crate::Field = crate::Field::new(32, 0, SFR_CGUFD_CFGFDCR_0_4_1); - pub const SFR_CGUFD_CFGFDCR_0_4_2: crate::Register = crate::Register::new(7, 0xffffff); - pub const SFR_CGUFD_CFGFDCR_0_4_2_CFGFDCR_0_4_2: crate::Field = crate::Field::new(24, 0, SFR_CGUFD_CFGFDCR_0_4_2); + pub const SFR_CGUFD_CFGFDCR_0_4_2: crate::Register = crate::Register::new(7, 0xffffffff); + pub const SFR_CGUFD_CFGFDCR_0_4_2_CFGFDCR_0_4_2: crate::Field = crate::Field::new(32, 0, SFR_CGUFD_CFGFDCR_0_4_2); - pub const SFR_CGUFD_CFGFDCR_0_4_3: crate::Register = crate::Register::new(8, 0xffffff); - pub const SFR_CGUFD_CFGFDCR_0_4_3_CFGFDCR_0_4_3: crate::Field = crate::Field::new(24, 0, SFR_CGUFD_CFGFDCR_0_4_3); + pub const SFR_CGUFD_CFGFDCR_0_4_3: crate::Register = crate::Register::new(8, 0xffffffff); + pub const SFR_CGUFD_CFGFDCR_0_4_3_CFGFDCR_0_4_3: crate::Field = crate::Field::new(32, 0, SFR_CGUFD_CFGFDCR_0_4_3); - pub const SFR_CGUFD_CFGFDCR_0_4_4: crate::Register = crate::Register::new(9, 0xffffff); - pub const SFR_CGUFD_CFGFDCR_0_4_4_CFGFDCR_0_4_4: crate::Field = crate::Field::new(24, 0, SFR_CGUFD_CFGFDCR_0_4_4); + pub const SFR_CGUFD_CFGFDCR_0_4_4: crate::Register = crate::Register::new(9, 0xffffffff); + pub const SFR_CGUFD_CFGFDCR_0_4_4_CFGFDCR_0_4_4: crate::Field = crate::Field::new(32, 0, SFR_CGUFD_CFGFDCR_0_4_4); - pub const SFR_CGUFDAO: crate::Register = crate::Register::new(10, 0xffffff); - pub const SFR_CGUFDAO_CFGFDCR: crate::Field = crate::Field::new(24, 0, SFR_CGUFDAO); + pub const SFR_CGUFDAO: crate::Register = crate::Register::new(10, 0xffffffff); + pub const SFR_CGUFDAO_CFGFDCR: crate::Field = crate::Field::new(32, 0, SFR_CGUFDAO); pub const SFR_CGUSET: crate::Register = crate::Register::new(11, 0xffffffff); pub const SFR_CGUSET_SFR_CGUSET: crate::Field = crate::Field::new(32, 0, SFR_CGUSET); @@ -2722,38 +2771,38 @@ pub mod utra { pub const SFR_CGUFDAORAM: crate::Register = crate::Register::new(14, 0xffff); pub const SFR_CGUFDAORAM_SFR_CGUFDAORAM: crate::Field = crate::Field::new(16, 0, SFR_CGUFDAORAM); - pub const SFR_CGUFDPER: crate::Register = crate::Register::new(15, 0xffffff); - pub const SFR_CGUFDPER_SFR_CGUFDPER: crate::Field = crate::Field::new(24, 0, SFR_CGUFDPER); + pub const SFR_CGUFDPER: crate::Register = crate::Register::new(15, 0xffffffff); + pub const SFR_CGUFDPER_SFR_CGUFDPER: crate::Field = crate::Field::new(32, 0, SFR_CGUFDPER); - pub const SFR_CGUFSSR_FSFREQ0: crate::Register = crate::Register::new(16, 0xffff); - pub const SFR_CGUFSSR_FSFREQ0_FSFREQ0: crate::Field = crate::Field::new(16, 0, SFR_CGUFSSR_FSFREQ0); + pub const SFR_CGUFSSR_FSFREQ0: crate::Register = crate::Register::new(16, 0xffffffff); + pub const SFR_CGUFSSR_FSFREQ0_FSFREQ0: crate::Field = crate::Field::new(32, 0, SFR_CGUFSSR_FSFREQ0); - pub const SFR_CGUFSSR_FSFREQ1: crate::Register = crate::Register::new(17, 0xffff); - pub const SFR_CGUFSSR_FSFREQ1_FSFREQ1: crate::Field = crate::Field::new(16, 0, SFR_CGUFSSR_FSFREQ1); + pub const SFR_CGUFSSR_FSFREQ1: crate::Register = crate::Register::new(17, 0xffffffff); + pub const SFR_CGUFSSR_FSFREQ1_FSFREQ1: crate::Field = crate::Field::new(32, 0, SFR_CGUFSSR_FSFREQ1); - pub const SFR_CGUFSSR_FSFREQ2: crate::Register = crate::Register::new(18, 0xffff); - pub const SFR_CGUFSSR_FSFREQ2_FSFREQ2: crate::Field = crate::Field::new(16, 0, SFR_CGUFSSR_FSFREQ2); + pub const SFR_CGUFSSR_FSFREQ2: crate::Register = crate::Register::new(18, 0xffffffff); + pub const SFR_CGUFSSR_FSFREQ2_FSFREQ2: crate::Field = crate::Field::new(32, 0, SFR_CGUFSSR_FSFREQ2); - pub const SFR_CGUFSSR_FSFREQ3: crate::Register = crate::Register::new(19, 0xffff); - pub const SFR_CGUFSSR_FSFREQ3_FSFREQ3: crate::Field = crate::Field::new(16, 0, SFR_CGUFSSR_FSFREQ3); + pub const SFR_CGUFSSR_FSFREQ3: crate::Register = crate::Register::new(19, 0xffffffff); + pub const SFR_CGUFSSR_FSFREQ3_FSFREQ3: crate::Field = crate::Field::new(32, 0, SFR_CGUFSSR_FSFREQ3); - pub const SFR_CGUFSVLD: crate::Register = crate::Register::new(20, 0xf); - pub const SFR_CGUFSVLD_SFR_CGUFSVLD: crate::Field = crate::Field::new(4, 0, SFR_CGUFSVLD); + pub const SFR_CGUFSVLD: crate::Register = crate::Register::new(20, 0xff); + pub const SFR_CGUFSVLD_SFR_CGUFSVLD: crate::Field = crate::Field::new(8, 0, SFR_CGUFSVLD); pub const SFR_CGUFSCR: crate::Register = crate::Register::new(21, 0xffff); pub const SFR_CGUFSCR_SFR_CGUFSCR: crate::Field = crate::Field::new(16, 0, SFR_CGUFSCR); pub const SFR_ACLKGR: crate::Register = crate::Register::new(24, 0xff); - pub const SFR_ACLKGR_SFR_ACLKGR: crate::Field = crate::Field::new(8, 0, SFR_ACLKGR); + pub const SFR_ACLKGR_ACLKSUBGATE: crate::Field = crate::Field::new(8, 0, SFR_ACLKGR); pub const SFR_HCLKGR: crate::Register = crate::Register::new(25, 0xff); - pub const SFR_HCLKGR_SFR_HCLKGR: crate::Field = crate::Field::new(8, 0, SFR_HCLKGR); + pub const SFR_HCLKGR_HCLKSUBGATE: crate::Field = crate::Field::new(8, 0, SFR_HCLKGR); pub const SFR_ICLKGR: crate::Register = crate::Register::new(26, 0xff); - pub const SFR_ICLKGR_SFR_ICLKGR: crate::Field = crate::Field::new(8, 0, SFR_ICLKGR); + pub const SFR_ICLKGR_ICLKSUBGATE: crate::Field = crate::Field::new(8, 0, SFR_ICLKGR); pub const SFR_PCLKGR: crate::Register = crate::Register::new(27, 0xff); - pub const SFR_PCLKGR_SFR_PCLKGR: crate::Field = crate::Field::new(8, 0, SFR_PCLKGR); + pub const SFR_PCLKGR_PCLKSUBGATE: crate::Field = crate::Field::new(8, 0, SFR_PCLKGR); pub const SFR_RCURST0: crate::Register = crate::Register::new(32, 0xffffffff); pub const SFR_RCURST0_SFR_RCURST0: crate::Field = crate::Field::new(32, 0, SFR_RCURST0); @@ -2810,13 +2859,14 @@ pub mod utra { pub const SFR_CFGINFO_CONSTANT1: crate::Field = crate::Field::new(8, 8, SFR_CFGINFO); pub const SFR_CFGINFO_CONSTANT2: crate::Field = crate::Field::new(16, 16, SFR_CFGINFO); - pub const SFR_CONFIG: crate::Register = crate::Register::new(2, 0xff); + pub const SFR_CONFIG: crate::Register = crate::Register::new(2, 0x3ff); pub const SFR_CONFIG_SNAP_OUTPUT_TO_WHICH: crate::Field = crate::Field::new(2, 0, SFR_CONFIG); pub const SFR_CONFIG_SNAP_OUTPUT_TO_QUANTUM: crate::Field = crate::Field::new(1, 2, SFR_CONFIG); pub const SFR_CONFIG_SNAP_INPUT_TO_WHICH: crate::Field = crate::Field::new(2, 3, SFR_CONFIG); pub const SFR_CONFIG_SNAP_INPUT_TO_QUANTUM: crate::Field = crate::Field::new(1, 5, SFR_CONFIG); pub const SFR_CONFIG_DISABLE_FILTER_PERI: crate::Field = crate::Field::new(1, 6, SFR_CONFIG); pub const SFR_CONFIG_DISABLE_FILTER_MEM: crate::Field = crate::Field::new(1, 7, SFR_CONFIG); + pub const SFR_CONFIG_CLOCKING_MODE: crate::Field = crate::Field::new(2, 8, SFR_CONFIG); pub const SFR_FLEVEL: crate::Register = crate::Register::new(3, 0xffff); pub const SFR_FLEVEL_PCLK_REGFIFO_LEVEL0: crate::Field = crate::Field::new(4, 0, SFR_FLEVEL); @@ -3776,7 +3826,7 @@ pub mod utra { } pub mod coresub_sramtrm { - pub const CORESUB_SRAMTRM_NUMREGS: usize = 7; + pub const CORESUB_SRAMTRM_NUMREGS: usize = 8; pub const SFR_CACHE: crate::Register = crate::Register::new(0, 0x7); pub const SFR_CACHE_SFR_CACHE: crate::Field = crate::Field::new(3, 0, SFR_CACHE); @@ -3799,6 +3849,9 @@ pub mod utra { pub const SFR_SRAMERR: crate::Register = crate::Register::new(8, 0xf); pub const SFR_SRAMERR_SRAMBANKERR: crate::Field = crate::Field::new(4, 0, SFR_SRAMERR); + pub const SFR_RAMSEC: crate::Register = crate::Register::new(12, 0xf); + pub const SFR_RAMSEC_RAMSEC: crate::Field = crate::Field::new(4, 0, SFR_RAMSEC); + pub const HW_CORESUB_SRAMTRM_BASE: usize = 0x40014000; } @@ -3957,8 +4010,8 @@ pub mod utra { pub mod rrc { pub const RRC_NUMREGS: usize = 11; - pub const SFR_RRCCR: crate::Register = crate::Register::new(0, 0x3); - pub const SFR_RRCCR_SFR_RRCCR: crate::Field = crate::Field::new(2, 0, SFR_RRCCR); + pub const SFR_RRCCR: crate::Register = crate::Register::new(0, 0xffffffff); + pub const SFR_RRCCR_SFR_RRCCR: crate::Field = crate::Field::new(32, 0, SFR_RRCCR); pub const SFR_RRCFD: crate::Register = crate::Register::new(1, 0x1f); pub const SFR_RRCFD_SFR_RRCFD: crate::Field = crate::Field::new(5, 0, SFR_RRCFD); @@ -3966,11 +4019,8 @@ pub mod utra { pub const SFR_RRCSR: crate::Register = crate::Register::new(2, 0x3ff); pub const SFR_RRCSR_SFR_RRCSR: crate::Field = crate::Field::new(10, 0, SFR_RRCSR); - pub const SFR_RRCFR: crate::Register = crate::Register::new(3, 0xf); - pub const SFR_RRCFR_SFR_RRCFR: crate::Field = crate::Field::new(4, 0, SFR_RRCFR); - - pub const SFR_RRCAR: crate::Register = crate::Register::new(4, 0xffffffff); - pub const SFR_RRCAR_SFR_RRCAR: crate::Field = crate::Field::new(32, 0, SFR_RRCAR); + pub const SFR_RRCFR: crate::Register = crate::Register::new(3, 0x1f); + pub const SFR_RRCFR_SFR_RRCFR: crate::Field = crate::Field::new(5, 0, SFR_RRCFR); pub const SFR_RRCSR_SET0: crate::Register = crate::Register::new(5, 0xffffffff); pub const SFR_RRCSR_SET0_TRC_SET_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_SET0); @@ -3990,29 +4040,32 @@ pub mod utra { pub const SFR_RRCSR_RD1: crate::Register = crate::Register::new(10, 0xffffffff); pub const SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_RD1); + pub const SFR_RRCAR: crate::Register = crate::Register::new(60, 0xffffffff); + pub const SFR_RRCAR_SFR_RRCAR: crate::Field = crate::Field::new(32, 0, SFR_RRCAR); + pub const HW_RRC_BASE: usize = 0x40000000; } pub mod gluechain { pub const GLUECHAIN_NUMREGS: usize = 4; - pub const SFR_GCMASK: crate::Register = crate::Register::new(0, 0xffffffff); - pub const SFR_GCMASK_CR_GCMASK: crate::Field = crate::Field::new(32, 0, SFR_GCMASK); + pub const SFR_GCMASK_CR_GCMASK0: crate::Register = crate::Register::new(0, 0xffffffff); + pub const SFR_GCMASK_CR_GCMASK0_CR_GCMASK0: crate::Field = crate::Field::new(32, 0, SFR_GCMASK_CR_GCMASK0); - pub const SFR_GCSR: crate::Register = crate::Register::new(1, 0xffffffff); - pub const SFR_GCSR_GLUEREG: crate::Field = crate::Field::new(32, 0, SFR_GCSR); + pub const SFR_GCSR_GLUEREG0: crate::Register = crate::Register::new(1, 0xffffffff); + pub const SFR_GCSR_GLUEREG0_GLUEREG0: crate::Field = crate::Field::new(32, 0, SFR_GCSR_GLUEREG0); - pub const SFR_GCRST: crate::Register = crate::Register::new(2, 0xffffffff); - pub const SFR_GCRST_GLUERST: crate::Field = crate::Field::new(32, 0, SFR_GCRST); + pub const SFR_GCRST_GLUERST0: crate::Register = crate::Register::new(2, 0xffffffff); + pub const SFR_GCRST_GLUERST0_GLUERST0: crate::Field = crate::Field::new(32, 0, SFR_GCRST_GLUERST0); - pub const SFR_GCTEST: crate::Register = crate::Register::new(3, 0xffffffff); - pub const SFR_GCTEST_GLUETEST: crate::Field = crate::Field::new(32, 0, SFR_GCTEST); + pub const SFR_GCTEST_GLUETEST0: crate::Register = crate::Register::new(3, 0xffffffff); + pub const SFR_GCTEST_GLUETEST0_GLUETEST0: crate::Field = crate::Field::new(32, 0, SFR_GCTEST_GLUETEST0); pub const HW_GLUECHAIN_BASE: usize = 0x40054000; } pub mod mesh { - pub const MESH_NUMREGS: usize = 10; + pub const MESH_NUMREGS: usize = 6; pub const SFR_MLDRV_CR_MLDRV0: crate::Register = crate::Register::new(0, 0xffffffff); pub const SFR_MLDRV_CR_MLDRV0_CR_MLDRV0: crate::Field = crate::Field::new(32, 0, SFR_MLDRV_CR_MLDRV0); @@ -4032,18 +4085,6 @@ pub mod utra { pub const SFR_MLSR_SR_MLSR3: crate::Register = crate::Register::new(5, 0xffffffff); pub const SFR_MLSR_SR_MLSR3_SR_MLSR3: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR3); - pub const SFR_MLSR_SR_MLSR4: crate::Register = crate::Register::new(6, 0xffffffff); - pub const SFR_MLSR_SR_MLSR4_SR_MLSR4: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR4); - - pub const SFR_MLSR_SR_MLSR5: crate::Register = crate::Register::new(7, 0xffffffff); - pub const SFR_MLSR_SR_MLSR5_SR_MLSR5: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR5); - - pub const SFR_MLSR_SR_MLSR6: crate::Register = crate::Register::new(8, 0xffffffff); - pub const SFR_MLSR_SR_MLSR6_SR_MLSR6: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR6); - - pub const SFR_MLSR_SR_MLSR7: crate::Register = crate::Register::new(9, 0xffffffff); - pub const SFR_MLSR_SR_MLSR7_SR_MLSR7: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR7); - pub const HW_MESH_BASE: usize = 0x40052000; } @@ -4095,8 +4136,8 @@ pub mod utra { pub const SFR_VDCFG_CR_VDCFG7: crate::Register = crate::Register::new(15, 0xf); pub const SFR_VDCFG_CR_VDCFG7_CR_VDCFG7: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG7); - pub const SFR_VDIP_ENA: crate::Register = crate::Register::new(16, 0xf); - pub const SFR_VDIP_ENA_VDENA: crate::Field = crate::Field::new(4, 0, SFR_VDIP_ENA); + pub const SFR_VDIP_ENA: crate::Register = crate::Register::new(16, 0x3f); + pub const SFR_VDIP_ENA_VDENA: crate::Field = crate::Field::new(6, 0, SFR_VDIP_ENA); pub const SFR_VDIP_TEST: crate::Register = crate::Register::new(17, 0xff); pub const SFR_VDIP_TEST_VDTST: crate::Field = crate::Field::new(8, 0, SFR_VDIP_TEST); @@ -4141,10 +4182,12 @@ pub mod utra { } pub mod ao_sysctrl { - pub const AO_SYSCTRL_NUMREGS: usize = 19; + pub const AO_SYSCTRL_NUMREGS: usize = 20; - pub const CR_CLK32KSEL: crate::Register = crate::Register::new(0, 0x1); - pub const CR_CLK32KSEL_CR_CLK32KSEL: crate::Field = crate::Field::new(1, 0, CR_CLK32KSEL); + pub const CR_CR: crate::Register = crate::Register::new(0, 0x7); + pub const CR_CR_CLK32KSELREG: crate::Field = crate::Field::new(1, 0, CR_CR); + pub const CR_CR_PDISOEN: crate::Field = crate::Field::new(1, 1, CR_CR); + pub const CR_CR_PCLKICG: crate::Field = crate::Field::new(1, 2, CR_CR); pub const CR_CLK1HZFD: crate::Register = crate::Register::new(1, 0x3fff); pub const CR_CLK1HZFD_CR_CLK1HZFD: crate::Field = crate::Field::new(14, 0, CR_CLK1HZFD); @@ -4156,8 +4199,8 @@ pub mod utra { pub const CR_RSTCRMASK: crate::Register = crate::Register::new(3, 0x1f); pub const CR_RSTCRMASK_CR_RSTCRMASK: crate::Field = crate::Field::new(5, 0, CR_RSTCRMASK); - pub const SFR_PMUCR: crate::Register = crate::Register::new(4, 0xff); - pub const SFR_PMUCR_SFRPMUCR: crate::Field = crate::Field::new(8, 0, SFR_PMUCR); + pub const SFR_PMUCSR: crate::Register = crate::Register::new(4, 0xff); + pub const SFR_PMUCSR_PMUCRREG: crate::Field = crate::Field::new(8, 0, SFR_PMUCSR); pub const SFR_PMUCRLP: crate::Register = crate::Register::new(5, 0xff); pub const SFR_PMUCRLP_SFRPMUCRLP: crate::Field = crate::Field::new(8, 0, SFR_PMUCRLP); @@ -4165,14 +4208,14 @@ pub mod utra { pub const SFR_PMUCRPD: crate::Register = crate::Register::new(6, 0xff); pub const SFR_PMUCRPD_SFRPMUCRPD: crate::Field = crate::Field::new(8, 0, SFR_PMUCRPD); - pub const SFR_PMUDFT: crate::Register = crate::Register::new(7, 0x3f); - pub const SFR_PMUDFT_SFRPMUDFT: crate::Field = crate::Field::new(6, 0, SFR_PMUDFT); + pub const SFR_PMUDFTSR: crate::Register = crate::Register::new(7, 0x3f); + pub const SFR_PMUDFTSR_PMUDFTREG: crate::Field = crate::Field::new(6, 0, SFR_PMUDFTSR); - pub const SFR_PMUTRM0: crate::Register = crate::Register::new(8, 0xffffffff); - pub const SFR_PMUTRM0_SFRPMUTRM: crate::Field = crate::Field::new(32, 0, SFR_PMUTRM0); + pub const SFR_PMUTRM0CSR: crate::Register = crate::Register::new(8, 0xffffffff); + pub const SFR_PMUTRM0CSR_PMUTRMREG: crate::Field = crate::Field::new(32, 0, SFR_PMUTRM0CSR); - pub const SFR_PMUTRM1: crate::Register = crate::Register::new(9, 0x3); - pub const SFR_PMUTRM1_SFRPMUTRM: crate::Field = crate::Field::new(2, 0, SFR_PMUTRM1); + pub const SFR_PMUTRM1CSR: crate::Register = crate::Register::new(9, 0x3); + pub const SFR_PMUTRM1CSR_PMUTRMREG: crate::Field = crate::Field::new(2, 0, SFR_PMUTRM1CSR); pub const SFR_PMUTRMLP0: crate::Register = crate::Register::new(10, 0xffffffff); pub const SFR_PMUTRMLP0_SFRPMUTRMLP: crate::Field = crate::Field::new(32, 0, SFR_PMUTRMLP0); @@ -4205,6 +4248,9 @@ pub mod utra { pub const SFR_IOX: crate::Register = crate::Register::new(24, 0x1); pub const SFR_IOX_SFR_IOX: crate::Field = crate::Field::new(1, 0, SFR_IOX); + pub const SFR_AOPADPU: crate::Register = crate::Register::new(25, 0x3ff); + pub const SFR_AOPADPU_SFR_AOPADPU: crate::Field = crate::Field::new(10, 0, SFR_AOPADPU); + pub const HW_AO_SYSCTRL_BASE: usize = 0x40060000; } @@ -12128,6 +12174,11 @@ mod tests { let mut baz = alu_csr.zf(utra::alu::SFR_FR_QS0ERR, bar); baz |= alu_csr.ms(utra::alu::SFR_FR_QS0ERR, 1); alu_csr.wfo(utra::alu::SFR_FR_QS0ERR, baz); + let bar = alu_csr.rf(utra::alu::SFR_FR_ALUINVLD); + alu_csr.rmwf(utra::alu::SFR_FR_ALUINVLD, bar); + let mut baz = alu_csr.zf(utra::alu::SFR_FR_ALUINVLD, bar); + baz |= alu_csr.ms(utra::alu::SFR_FR_ALUINVLD, 1); + alu_csr.wfo(utra::alu::SFR_FR_ALUINVLD, baz); let foo = alu_csr.r(utra::alu::SFR_CRDIVLEN); alu_csr.wo(utra::alu::SFR_CRDIVLEN, foo); @@ -12392,6 +12443,11 @@ mod tests { let mut baz = combohash_csr.zf(utra::combohash::SFR_FR_CHKPASS, bar); baz |= combohash_csr.ms(utra::combohash::SFR_FR_CHKPASS, 1); combohash_csr.wfo(utra::combohash::SFR_FR_CHKPASS, baz); + let bar = combohash_csr.rf(utra::combohash::SFR_FR_CHKFAIL); + combohash_csr.rmwf(utra::combohash::SFR_FR_CHKFAIL, bar); + let mut baz = combohash_csr.zf(utra::combohash::SFR_FR_CHKFAIL, bar); + baz |= combohash_csr.ms(utra::combohash::SFR_FR_CHKFAIL, 1); + combohash_csr.wfo(utra::combohash::SFR_FR_CHKFAIL, baz); let foo = combohash_csr.r(utra::combohash::SFR_OPT1); combohash_csr.wo(utra::combohash::SFR_OPT1, foo); @@ -12423,6 +12479,16 @@ mod tests { let mut baz = combohash_csr.zf(utra::combohash::SFR_OPT2_OPT_SCHNR1_0, bar); baz |= combohash_csr.ms(utra::combohash::SFR_OPT2_OPT_SCHNR1_0, 1); combohash_csr.wfo(utra::combohash::SFR_OPT2_OPT_SCHNR1_0, baz); + let bar = combohash_csr.rf(utra::combohash::SFR_OPT2_TSMODE); + combohash_csr.rmwf(utra::combohash::SFR_OPT2_TSMODE, bar); + let mut baz = combohash_csr.zf(utra::combohash::SFR_OPT2_TSMODE, bar); + baz |= combohash_csr.ms(utra::combohash::SFR_OPT2_TSMODE, 1); + combohash_csr.wfo(utra::combohash::SFR_OPT2_TSMODE, baz); + let bar = combohash_csr.rf(utra::combohash::SFR_OPT2_CR_OPT_IFSKEY); + combohash_csr.rmwf(utra::combohash::SFR_OPT2_CR_OPT_IFSKEY, bar); + let mut baz = combohash_csr.zf(utra::combohash::SFR_OPT2_CR_OPT_IFSKEY, bar); + baz |= combohash_csr.ms(utra::combohash::SFR_OPT2_CR_OPT_IFSKEY, 1); + combohash_csr.wfo(utra::combohash::SFR_OPT2_CR_OPT_IFSKEY, baz); let foo = combohash_csr.r(utra::combohash::SFR_OPT3); combohash_csr.wo(utra::combohash::SFR_OPT3, foo); @@ -12487,6 +12553,14 @@ mod tests { let mut baz = combohash_csr.zf(utra::combohash::SFR_SEGPTR_SEGID_HOUT2_SEGID_HOUT2, bar); baz |= combohash_csr.ms(utra::combohash::SFR_SEGPTR_SEGID_HOUT2_SEGID_HOUT2, 1); combohash_csr.wfo(utra::combohash::SFR_SEGPTR_SEGID_HOUT2_SEGID_HOUT2, baz); + + let foo = combohash_csr.r(utra::combohash::SFR_KEYIDX); + combohash_csr.wo(utra::combohash::SFR_KEYIDX, foo); + let bar = combohash_csr.rf(utra::combohash::SFR_KEYIDX_SFR_KEYIDX); + combohash_csr.rmwf(utra::combohash::SFR_KEYIDX_SFR_KEYIDX, bar); + let mut baz = combohash_csr.zf(utra::combohash::SFR_KEYIDX_SFR_KEYIDX, bar); + baz |= combohash_csr.ms(utra::combohash::SFR_KEYIDX_SFR_KEYIDX, 1); + combohash_csr.wfo(utra::combohash::SFR_KEYIDX_SFR_KEYIDX, baz); } #[test] @@ -12644,6 +12718,38 @@ mod tests { let mut baz = pke_csr.zf(utra::pke::SFR_SEGPTR_PTRID_POB_PTRID_POB, bar); baz |= pke_csr.ms(utra::pke::SFR_SEGPTR_PTRID_POB_PTRID_POB, 1); pke_csr.wfo(utra::pke::SFR_SEGPTR_PTRID_POB_PTRID_POB, baz); + + let foo = pke_csr.r(utra::pke::SFR_TICKCYC); + pke_csr.wo(utra::pke::SFR_TICKCYC, foo); + let bar = pke_csr.rf(utra::pke::SFR_TICKCYC_SFR_TICKCYC); + pke_csr.rmwf(utra::pke::SFR_TICKCYC_SFR_TICKCYC, bar); + let mut baz = pke_csr.zf(utra::pke::SFR_TICKCYC_SFR_TICKCYC, bar); + baz |= pke_csr.ms(utra::pke::SFR_TICKCYC_SFR_TICKCYC, 1); + pke_csr.wfo(utra::pke::SFR_TICKCYC_SFR_TICKCYC, baz); + + let foo = pke_csr.r(utra::pke::SFR_TICKCNT); + pke_csr.wo(utra::pke::SFR_TICKCNT, foo); + let bar = pke_csr.rf(utra::pke::SFR_TICKCNT_SFR_TICKCNT); + pke_csr.rmwf(utra::pke::SFR_TICKCNT_SFR_TICKCNT, bar); + let mut baz = pke_csr.zf(utra::pke::SFR_TICKCNT_SFR_TICKCNT, bar); + baz |= pke_csr.ms(utra::pke::SFR_TICKCNT_SFR_TICKCNT, 1); + pke_csr.wfo(utra::pke::SFR_TICKCNT_SFR_TICKCNT, baz); + + let foo = pke_csr.r(utra::pke::SFR_MASKSEED); + pke_csr.wo(utra::pke::SFR_MASKSEED, foo); + let bar = pke_csr.rf(utra::pke::SFR_MASKSEED_SFR_MASKSEED); + pke_csr.rmwf(utra::pke::SFR_MASKSEED_SFR_MASKSEED, bar); + let mut baz = pke_csr.zf(utra::pke::SFR_MASKSEED_SFR_MASKSEED, bar); + baz |= pke_csr.ms(utra::pke::SFR_MASKSEED_SFR_MASKSEED, 1); + pke_csr.wfo(utra::pke::SFR_MASKSEED_SFR_MASKSEED, baz); + + let foo = pke_csr.r(utra::pke::SFR_MASKSEEDAR); + pke_csr.wo(utra::pke::SFR_MASKSEEDAR, foo); + let bar = pke_csr.rf(utra::pke::SFR_MASKSEEDAR_SFR_MASKSEEDAR); + pke_csr.rmwf(utra::pke::SFR_MASKSEEDAR_SFR_MASKSEEDAR, bar); + let mut baz = pke_csr.zf(utra::pke::SFR_MASKSEEDAR_SFR_MASKSEEDAR, bar); + baz |= pke_csr.ms(utra::pke::SFR_MASKSEEDAR_SFR_MASKSEEDAR, 1); + pke_csr.wfo(utra::pke::SFR_MASKSEEDAR_SFR_MASKSEEDAR, baz); } #[test] @@ -12773,35 +12879,35 @@ mod tests { let foo = scedma_csr.r(utra::scedma::SFR_XCH_FUNC); scedma_csr.wo(utra::scedma::SFR_XCH_FUNC, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_XCH_FUNC_SFR_XCH_FUNC); - scedma_csr.rmwf(utra::scedma::SFR_XCH_FUNC_SFR_XCH_FUNC, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_FUNC_SFR_XCH_FUNC, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_XCH_FUNC_SFR_XCH_FUNC, 1); - scedma_csr.wfo(utra::scedma::SFR_XCH_FUNC_SFR_XCH_FUNC, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_XCH_FUNC_XCHCR_FUNC); + scedma_csr.rmwf(utra::scedma::SFR_XCH_FUNC_XCHCR_FUNC, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_FUNC_XCHCR_FUNC, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_XCH_FUNC_XCHCR_FUNC, 1); + scedma_csr.wfo(utra::scedma::SFR_XCH_FUNC_XCHCR_FUNC, baz); let foo = scedma_csr.r(utra::scedma::SFR_XCH_OPT); scedma_csr.wo(utra::scedma::SFR_XCH_OPT, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_XCH_OPT_SFR_XCH_OPT); - scedma_csr.rmwf(utra::scedma::SFR_XCH_OPT_SFR_XCH_OPT, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_OPT_SFR_XCH_OPT, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_XCH_OPT_SFR_XCH_OPT, 1); - scedma_csr.wfo(utra::scedma::SFR_XCH_OPT_SFR_XCH_OPT, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_XCH_OPT_XCHCR_OPT); + scedma_csr.rmwf(utra::scedma::SFR_XCH_OPT_XCHCR_OPT, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_OPT_XCHCR_OPT, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_XCH_OPT_XCHCR_OPT, 1); + scedma_csr.wfo(utra::scedma::SFR_XCH_OPT_XCHCR_OPT, baz); let foo = scedma_csr.r(utra::scedma::SFR_XCH_AXSTART); scedma_csr.wo(utra::scedma::SFR_XCH_AXSTART, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_XCH_AXSTART_SFR_XCH_AXSTART); - scedma_csr.rmwf(utra::scedma::SFR_XCH_AXSTART_SFR_XCH_AXSTART, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_AXSTART_SFR_XCH_AXSTART, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_XCH_AXSTART_SFR_XCH_AXSTART, 1); - scedma_csr.wfo(utra::scedma::SFR_XCH_AXSTART_SFR_XCH_AXSTART, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_XCH_AXSTART_XCHCR_AXSTART); + scedma_csr.rmwf(utra::scedma::SFR_XCH_AXSTART_XCHCR_AXSTART, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_AXSTART_XCHCR_AXSTART, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_XCH_AXSTART_XCHCR_AXSTART, 1); + scedma_csr.wfo(utra::scedma::SFR_XCH_AXSTART_XCHCR_AXSTART, baz); let foo = scedma_csr.r(utra::scedma::SFR_XCH_SEGID); scedma_csr.wo(utra::scedma::SFR_XCH_SEGID, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_XCH_SEGID_SFR_XCH_SEGID); - scedma_csr.rmwf(utra::scedma::SFR_XCH_SEGID_SFR_XCH_SEGID, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_SEGID_SFR_XCH_SEGID, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_XCH_SEGID_SFR_XCH_SEGID, 1); - scedma_csr.wfo(utra::scedma::SFR_XCH_SEGID_SFR_XCH_SEGID, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_XCH_SEGID_XCHCR_SEGID); + scedma_csr.rmwf(utra::scedma::SFR_XCH_SEGID_XCHCR_SEGID, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_XCH_SEGID_XCHCR_SEGID, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_XCH_SEGID_XCHCR_SEGID, 1); + scedma_csr.wfo(utra::scedma::SFR_XCH_SEGID_XCHCR_SEGID, baz); let foo = scedma_csr.r(utra::scedma::SFR_XCH_SEGSTART); scedma_csr.wo(utra::scedma::SFR_XCH_SEGSTART, foo); @@ -12821,35 +12927,35 @@ mod tests { let foo = scedma_csr.r(utra::scedma::SFR_SCH_FUNC); scedma_csr.wo(utra::scedma::SFR_SCH_FUNC, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_SCH_FUNC_SFR_SCH_FUNC); - scedma_csr.rmwf(utra::scedma::SFR_SCH_FUNC_SFR_SCH_FUNC, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_FUNC_SFR_SCH_FUNC, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_SCH_FUNC_SFR_SCH_FUNC, 1); - scedma_csr.wfo(utra::scedma::SFR_SCH_FUNC_SFR_SCH_FUNC, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_SCH_FUNC_SCHCR_FUNC); + scedma_csr.rmwf(utra::scedma::SFR_SCH_FUNC_SCHCR_FUNC, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_FUNC_SCHCR_FUNC, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_SCH_FUNC_SCHCR_FUNC, 1); + scedma_csr.wfo(utra::scedma::SFR_SCH_FUNC_SCHCR_FUNC, baz); let foo = scedma_csr.r(utra::scedma::SFR_SCH_OPT); scedma_csr.wo(utra::scedma::SFR_SCH_OPT, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_SCH_OPT_SFR_SCH_OPT); - scedma_csr.rmwf(utra::scedma::SFR_SCH_OPT_SFR_SCH_OPT, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_OPT_SFR_SCH_OPT, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_SCH_OPT_SFR_SCH_OPT, 1); - scedma_csr.wfo(utra::scedma::SFR_SCH_OPT_SFR_SCH_OPT, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_SCH_OPT_SCHCR_OPT); + scedma_csr.rmwf(utra::scedma::SFR_SCH_OPT_SCHCR_OPT, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_OPT_SCHCR_OPT, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_SCH_OPT_SCHCR_OPT, 1); + scedma_csr.wfo(utra::scedma::SFR_SCH_OPT_SCHCR_OPT, baz); let foo = scedma_csr.r(utra::scedma::SFR_SCH_AXSTART); scedma_csr.wo(utra::scedma::SFR_SCH_AXSTART, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_SCH_AXSTART_SFR_SCH_AXSTART); - scedma_csr.rmwf(utra::scedma::SFR_SCH_AXSTART_SFR_SCH_AXSTART, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_AXSTART_SFR_SCH_AXSTART, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_SCH_AXSTART_SFR_SCH_AXSTART, 1); - scedma_csr.wfo(utra::scedma::SFR_SCH_AXSTART_SFR_SCH_AXSTART, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_SCH_AXSTART_SCHCR_AXSTART); + scedma_csr.rmwf(utra::scedma::SFR_SCH_AXSTART_SCHCR_AXSTART, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_AXSTART_SCHCR_AXSTART, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_SCH_AXSTART_SCHCR_AXSTART, 1); + scedma_csr.wfo(utra::scedma::SFR_SCH_AXSTART_SCHCR_AXSTART, baz); let foo = scedma_csr.r(utra::scedma::SFR_SCH_SEGID); scedma_csr.wo(utra::scedma::SFR_SCH_SEGID, foo); - let bar = scedma_csr.rf(utra::scedma::SFR_SCH_SEGID_SFR_SCH_SEGID); - scedma_csr.rmwf(utra::scedma::SFR_SCH_SEGID_SFR_SCH_SEGID, bar); - let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_SEGID_SFR_SCH_SEGID, bar); - baz |= scedma_csr.ms(utra::scedma::SFR_SCH_SEGID_SFR_SCH_SEGID, 1); - scedma_csr.wfo(utra::scedma::SFR_SCH_SEGID_SFR_SCH_SEGID, baz); + let bar = scedma_csr.rf(utra::scedma::SFR_SCH_SEGID_SCHCR_SEGID); + scedma_csr.rmwf(utra::scedma::SFR_SCH_SEGID_SCHCR_SEGID, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_SCH_SEGID_SCHCR_SEGID, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_SCH_SEGID_SCHCR_SEGID, 1); + scedma_csr.wfo(utra::scedma::SFR_SCH_SEGID_SCHCR_SEGID, baz); let foo = scedma_csr.r(utra::scedma::SFR_SCH_SEGSTART); scedma_csr.wo(utra::scedma::SFR_SCH_SEGSTART, foo); @@ -12906,6 +13012,22 @@ mod tests { let mut baz = scedma_csr.zf(utra::scedma::SFR_ICH_TRANSIZE_ICHCR_TRANSIZE, bar); baz |= scedma_csr.ms(utra::scedma::SFR_ICH_TRANSIZE_ICHCR_TRANSIZE, 1); scedma_csr.wfo(utra::scedma::SFR_ICH_TRANSIZE_ICHCR_TRANSIZE, baz); + + let foo = scedma_csr.r(utra::scedma::SFR_WDATABYPASS_MODE); + scedma_csr.wo(utra::scedma::SFR_WDATABYPASS_MODE, foo); + let bar = scedma_csr.rf(utra::scedma::SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE); + scedma_csr.rmwf(utra::scedma::SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE, 1); + scedma_csr.wfo(utra::scedma::SFR_WDATABYPASS_MODE_SFR_WDATABYPASS_MODE, baz); + + let foo = scedma_csr.r(utra::scedma::SFR_WDATABYPASS_DATA); + scedma_csr.wo(utra::scedma::SFR_WDATABYPASS_DATA, foo); + let bar = scedma_csr.rf(utra::scedma::SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA); + scedma_csr.rmwf(utra::scedma::SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA, bar); + let mut baz = scedma_csr.zf(utra::scedma::SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA, bar); + baz |= scedma_csr.ms(utra::scedma::SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA, 1); + scedma_csr.wfo(utra::scedma::SFR_WDATABYPASS_DATA_SFR_WDATABYPASS_DATA, baz); } #[test] @@ -12914,14 +13036,6 @@ mod tests { use super::*; let mut sce_glbsfr_csr = CSR::new(HW_SCE_GLBSFR_BASE as *mut u32); - let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_SCEMODE); - sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_SCEMODE, foo); - let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_SCEMODE_CR_SCEMODE); - sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_SCEMODE_CR_SCEMODE, bar); - let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_SCEMODE_CR_SCEMODE, bar); - baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_SCEMODE_CR_SCEMODE, 1); - sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_SCEMODE_CR_SCEMODE, baz); - let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_SUBEN); sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_SUBEN, foo); let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_SUBEN_CR_SUBEN); @@ -13058,13 +13172,37 @@ mod tests { baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_FRACERR_FR_ACERR, 1); sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_FRACERR_FR_ACERR, baz); - let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_TS); - sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_TS, foo); - let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_TS_CR_TS); - sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_TS_CR_TS, bar); - let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_TS_CR_TS, bar); - baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_TS_CR_TS, 1); - sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_TS_CR_TS, baz); + let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_TS_SR_TS0); + sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_TS_SR_TS0, foo); + let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_TS_SR_TS0_SR_TS0); + sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_TS_SR_TS0_SR_TS0, bar); + let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_TS_SR_TS0_SR_TS0, bar); + baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_TS_SR_TS0_SR_TS0, 1); + sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_TS_SR_TS0_SR_TS0, baz); + + let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_TS_SR_TS1); + sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_TS_SR_TS1, foo); + let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_TS_SR_TS1_SR_TS1); + sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_TS_SR_TS1_SR_TS1, bar); + let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_TS_SR_TS1_SR_TS1, bar); + baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_TS_SR_TS1_SR_TS1, 1); + sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_TS_SR_TS1_SR_TS1, baz); + + let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_TS_SR_TS2); + sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_TS_SR_TS2, foo); + let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_TS_SR_TS2_SR_TS2); + sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_TS_SR_TS2_SR_TS2, bar); + let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_TS_SR_TS2_SR_TS2, bar); + baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_TS_SR_TS2_SR_TS2, 1); + sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_TS_SR_TS2_SR_TS2, baz); + + let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_TS_SR_TS3); + sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_TS_SR_TS3, foo); + let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_TS_SR_TS3_SR_TS3); + sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_TS_SR_TS3_SR_TS3, bar); + let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_TS_SR_TS3_SR_TS3, bar); + baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_TS_SR_TS3_SR_TS3, 1); + sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_TS_SR_TS3_SR_TS3, baz); } #[test] @@ -13237,13 +13375,13 @@ mod tests { baz |= evc_csr.ms(utra::evc::SFR_TMREVSEL_TMR_EVSEL, 1); evc_csr.wfo(utra::evc::SFR_TMREVSEL_TMR_EVSEL, baz); - let foo = evc_csr.r(utra::evc::SFR_PWMEVSEL); - evc_csr.wo(utra::evc::SFR_PWMEVSEL, foo); - let bar = evc_csr.rf(utra::evc::SFR_PWMEVSEL_PWM_EVSEL); - evc_csr.rmwf(utra::evc::SFR_PWMEVSEL_PWM_EVSEL, bar); - let mut baz = evc_csr.zf(utra::evc::SFR_PWMEVSEL_PWM_EVSEL, bar); - baz |= evc_csr.ms(utra::evc::SFR_PWMEVSEL_PWM_EVSEL, 1); - evc_csr.wfo(utra::evc::SFR_PWMEVSEL_PWM_EVSEL, baz); + let foo = evc_csr.r(utra::evc::SFR_TMREVEN); + evc_csr.wo(utra::evc::SFR_TMREVEN, foo); + let bar = evc_csr.rf(utra::evc::SFR_TMREVEN_SFR_TMREVEN); + evc_csr.rmwf(utra::evc::SFR_TMREVEN_SFR_TMREVEN, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_TMREVEN_SFR_TMREVEN, bar); + baz |= evc_csr.ms(utra::evc::SFR_TMREVEN_SFR_TMREVEN, 1); + evc_csr.wfo(utra::evc::SFR_TMREVEN_SFR_TMREVEN, baz); let foo = evc_csr.r(utra::evc::SFR_IFEVEN_IFEVEN0); evc_csr.wo(utra::evc::SFR_IFEVEN_IFEVEN0, foo); @@ -13324,6 +13462,54 @@ mod tests { let mut baz = evc_csr.zf(utra::evc::SFR_CM7ERRFR_ERRIN, bar); baz |= evc_csr.ms(utra::evc::SFR_CM7ERRFR_ERRIN, 1); evc_csr.wfo(utra::evc::SFR_CM7ERRFR_ERRIN, baz); + + let foo = evc_csr.r(utra::evc::SFR_CM7ERRCR); + evc_csr.wo(utra::evc::SFR_CM7ERRCR, foo); + let bar = evc_csr.rf(utra::evc::SFR_CM7ERRCR_ERREN); + evc_csr.rmwf(utra::evc::SFR_CM7ERRCR_ERREN, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_CM7ERRCR_ERREN, bar); + baz |= evc_csr.ms(utra::evc::SFR_CM7ERRCR_ERREN, 1); + evc_csr.wfo(utra::evc::SFR_CM7ERRCR_ERREN, baz); + + let foo = evc_csr.r(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0); + evc_csr.wo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0, foo); + let bar = evc_csr.rf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0); + evc_csr.rmwf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0, bar); + baz |= evc_csr.ms(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0, 1); + evc_csr.wfo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL0_RRC_EVSEL0, baz); + + let foo = evc_csr.r(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1); + evc_csr.wo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1, foo); + let bar = evc_csr.rf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1); + evc_csr.rmwf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1, bar); + baz |= evc_csr.ms(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1, 1); + evc_csr.wfo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL1_RRC_EVSEL1, baz); + + let foo = evc_csr.r(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2); + evc_csr.wo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2, foo); + let bar = evc_csr.rf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2); + evc_csr.rmwf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2, bar); + baz |= evc_csr.ms(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2, 1); + evc_csr.wfo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL2_RRC_EVSEL2, baz); + + let foo = evc_csr.r(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3); + evc_csr.wo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3, foo); + let bar = evc_csr.rf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3); + evc_csr.rmwf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3, bar); + baz |= evc_csr.ms(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3, 1); + evc_csr.wfo(utra::evc::SFR_RRCEVSEL_RRC_EVSEL3_RRC_EVSEL3, baz); + + let foo = evc_csr.r(utra::evc::SFR_RRCEVEN); + evc_csr.wo(utra::evc::SFR_RRCEVEN, foo); + let bar = evc_csr.rf(utra::evc::SFR_RRCEVEN_RRC_EVEN); + evc_csr.rmwf(utra::evc::SFR_RRCEVEN_RRC_EVEN, bar); + let mut baz = evc_csr.zf(utra::evc::SFR_RRCEVEN_RRC_EVEN, bar); + baz |= evc_csr.ms(utra::evc::SFR_RRCEVEN_RRC_EVEN, 1); + evc_csr.wfo(utra::evc::SFR_RRCEVEN_RRC_EVEN, baz); } #[test] @@ -13510,35 +13696,35 @@ mod tests { let foo = sysctrl_csr.r(utra::sysctrl::SFR_ACLKGR); sysctrl_csr.wo(utra::sysctrl::SFR_ACLKGR, foo); - let bar = sysctrl_csr.rf(utra::sysctrl::SFR_ACLKGR_SFR_ACLKGR); - sysctrl_csr.rmwf(utra::sysctrl::SFR_ACLKGR_SFR_ACLKGR, bar); - let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_ACLKGR_SFR_ACLKGR, bar); - baz |= sysctrl_csr.ms(utra::sysctrl::SFR_ACLKGR_SFR_ACLKGR, 1); - sysctrl_csr.wfo(utra::sysctrl::SFR_ACLKGR_SFR_ACLKGR, baz); + let bar = sysctrl_csr.rf(utra::sysctrl::SFR_ACLKGR_ACLKSUBGATE); + sysctrl_csr.rmwf(utra::sysctrl::SFR_ACLKGR_ACLKSUBGATE, bar); + let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_ACLKGR_ACLKSUBGATE, bar); + baz |= sysctrl_csr.ms(utra::sysctrl::SFR_ACLKGR_ACLKSUBGATE, 1); + sysctrl_csr.wfo(utra::sysctrl::SFR_ACLKGR_ACLKSUBGATE, baz); let foo = sysctrl_csr.r(utra::sysctrl::SFR_HCLKGR); sysctrl_csr.wo(utra::sysctrl::SFR_HCLKGR, foo); - let bar = sysctrl_csr.rf(utra::sysctrl::SFR_HCLKGR_SFR_HCLKGR); - sysctrl_csr.rmwf(utra::sysctrl::SFR_HCLKGR_SFR_HCLKGR, bar); - let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_HCLKGR_SFR_HCLKGR, bar); - baz |= sysctrl_csr.ms(utra::sysctrl::SFR_HCLKGR_SFR_HCLKGR, 1); - sysctrl_csr.wfo(utra::sysctrl::SFR_HCLKGR_SFR_HCLKGR, baz); + let bar = sysctrl_csr.rf(utra::sysctrl::SFR_HCLKGR_HCLKSUBGATE); + sysctrl_csr.rmwf(utra::sysctrl::SFR_HCLKGR_HCLKSUBGATE, bar); + let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_HCLKGR_HCLKSUBGATE, bar); + baz |= sysctrl_csr.ms(utra::sysctrl::SFR_HCLKGR_HCLKSUBGATE, 1); + sysctrl_csr.wfo(utra::sysctrl::SFR_HCLKGR_HCLKSUBGATE, baz); let foo = sysctrl_csr.r(utra::sysctrl::SFR_ICLKGR); sysctrl_csr.wo(utra::sysctrl::SFR_ICLKGR, foo); - let bar = sysctrl_csr.rf(utra::sysctrl::SFR_ICLKGR_SFR_ICLKGR); - sysctrl_csr.rmwf(utra::sysctrl::SFR_ICLKGR_SFR_ICLKGR, bar); - let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_ICLKGR_SFR_ICLKGR, bar); - baz |= sysctrl_csr.ms(utra::sysctrl::SFR_ICLKGR_SFR_ICLKGR, 1); - sysctrl_csr.wfo(utra::sysctrl::SFR_ICLKGR_SFR_ICLKGR, baz); + let bar = sysctrl_csr.rf(utra::sysctrl::SFR_ICLKGR_ICLKSUBGATE); + sysctrl_csr.rmwf(utra::sysctrl::SFR_ICLKGR_ICLKSUBGATE, bar); + let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_ICLKGR_ICLKSUBGATE, bar); + baz |= sysctrl_csr.ms(utra::sysctrl::SFR_ICLKGR_ICLKSUBGATE, 1); + sysctrl_csr.wfo(utra::sysctrl::SFR_ICLKGR_ICLKSUBGATE, baz); let foo = sysctrl_csr.r(utra::sysctrl::SFR_PCLKGR); sysctrl_csr.wo(utra::sysctrl::SFR_PCLKGR, foo); - let bar = sysctrl_csr.rf(utra::sysctrl::SFR_PCLKGR_SFR_PCLKGR); - sysctrl_csr.rmwf(utra::sysctrl::SFR_PCLKGR_SFR_PCLKGR, bar); - let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_PCLKGR_SFR_PCLKGR, bar); - baz |= sysctrl_csr.ms(utra::sysctrl::SFR_PCLKGR_SFR_PCLKGR, 1); - sysctrl_csr.wfo(utra::sysctrl::SFR_PCLKGR_SFR_PCLKGR, baz); + let bar = sysctrl_csr.rf(utra::sysctrl::SFR_PCLKGR_PCLKSUBGATE); + sysctrl_csr.rmwf(utra::sysctrl::SFR_PCLKGR_PCLKSUBGATE, bar); + let mut baz = sysctrl_csr.zf(utra::sysctrl::SFR_PCLKGR_PCLKSUBGATE, bar); + baz |= sysctrl_csr.ms(utra::sysctrl::SFR_PCLKGR_PCLKSUBGATE, 1); + sysctrl_csr.wfo(utra::sysctrl::SFR_PCLKGR_PCLKSUBGATE, baz); let foo = sysctrl_csr.r(utra::sysctrl::SFR_RCURST0); sysctrl_csr.wo(utra::sysctrl::SFR_RCURST0, foo); @@ -13710,6 +13896,11 @@ mod tests { let mut baz = bio_bdma_csr.zf(utra::bio_bdma::SFR_CONFIG_DISABLE_FILTER_MEM, bar); baz |= bio_bdma_csr.ms(utra::bio_bdma::SFR_CONFIG_DISABLE_FILTER_MEM, 1); bio_bdma_csr.wfo(utra::bio_bdma::SFR_CONFIG_DISABLE_FILTER_MEM, baz); + let bar = bio_bdma_csr.rf(utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE); + bio_bdma_csr.rmwf(utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE, bar); + let mut baz = bio_bdma_csr.zf(utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE, bar); + baz |= bio_bdma_csr.ms(utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE, 1); + bio_bdma_csr.wfo(utra::bio_bdma::SFR_CONFIG_CLOCKING_MODE, baz); let foo = bio_bdma_csr.r(utra::bio_bdma::SFR_FLEVEL); bio_bdma_csr.wo(utra::bio_bdma::SFR_FLEVEL, foo); @@ -16521,6 +16712,14 @@ mod tests { let mut baz = coresub_sramtrm_csr.zf(utra::coresub_sramtrm::SFR_SRAMERR_SRAMBANKERR, bar); baz |= coresub_sramtrm_csr.ms(utra::coresub_sramtrm::SFR_SRAMERR_SRAMBANKERR, 1); coresub_sramtrm_csr.wfo(utra::coresub_sramtrm::SFR_SRAMERR_SRAMBANKERR, baz); + + let foo = coresub_sramtrm_csr.r(utra::coresub_sramtrm::SFR_RAMSEC); + coresub_sramtrm_csr.wo(utra::coresub_sramtrm::SFR_RAMSEC, foo); + let bar = coresub_sramtrm_csr.rf(utra::coresub_sramtrm::SFR_RAMSEC_RAMSEC); + coresub_sramtrm_csr.rmwf(utra::coresub_sramtrm::SFR_RAMSEC_RAMSEC, bar); + let mut baz = coresub_sramtrm_csr.zf(utra::coresub_sramtrm::SFR_RAMSEC_RAMSEC, bar); + baz |= coresub_sramtrm_csr.ms(utra::coresub_sramtrm::SFR_RAMSEC_RAMSEC, 1); + coresub_sramtrm_csr.wfo(utra::coresub_sramtrm::SFR_RAMSEC_RAMSEC, baz); } #[test] @@ -16951,14 +17150,6 @@ mod tests { baz |= rrc_csr.ms(utra::rrc::SFR_RRCFR_SFR_RRCFR, 1); rrc_csr.wfo(utra::rrc::SFR_RRCFR_SFR_RRCFR, baz); - let foo = rrc_csr.r(utra::rrc::SFR_RRCAR); - rrc_csr.wo(utra::rrc::SFR_RRCAR, foo); - let bar = rrc_csr.rf(utra::rrc::SFR_RRCAR_SFR_RRCAR); - rrc_csr.rmwf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar); - let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar); - baz |= rrc_csr.ms(utra::rrc::SFR_RRCAR_SFR_RRCAR, 1); - rrc_csr.wfo(utra::rrc::SFR_RRCAR_SFR_RRCAR, baz); - let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_SET0); rrc_csr.wo(utra::rrc::SFR_RRCSR_SET0, foo); let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE); @@ -17006,6 +17197,14 @@ mod tests { let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, bar); baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, 1); rrc_csr.wfo(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, baz); + + let foo = rrc_csr.r(utra::rrc::SFR_RRCAR); + rrc_csr.wo(utra::rrc::SFR_RRCAR, foo); + let bar = rrc_csr.rf(utra::rrc::SFR_RRCAR_SFR_RRCAR); + rrc_csr.rmwf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar); + let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar); + baz |= rrc_csr.ms(utra::rrc::SFR_RRCAR_SFR_RRCAR, 1); + rrc_csr.wfo(utra::rrc::SFR_RRCAR_SFR_RRCAR, baz); } #[test] @@ -17014,37 +17213,37 @@ mod tests { use super::*; let mut gluechain_csr = CSR::new(HW_GLUECHAIN_BASE as *mut u32); - let foo = gluechain_csr.r(utra::gluechain::SFR_GCMASK); - gluechain_csr.wo(utra::gluechain::SFR_GCMASK, foo); - let bar = gluechain_csr.rf(utra::gluechain::SFR_GCMASK_CR_GCMASK); - gluechain_csr.rmwf(utra::gluechain::SFR_GCMASK_CR_GCMASK, bar); - let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCMASK_CR_GCMASK, bar); - baz |= gluechain_csr.ms(utra::gluechain::SFR_GCMASK_CR_GCMASK, 1); - gluechain_csr.wfo(utra::gluechain::SFR_GCMASK_CR_GCMASK, baz); + let foo = gluechain_csr.r(utra::gluechain::SFR_GCMASK_CR_GCMASK0); + gluechain_csr.wo(utra::gluechain::SFR_GCMASK_CR_GCMASK0, foo); + let bar = gluechain_csr.rf(utra::gluechain::SFR_GCMASK_CR_GCMASK0_CR_GCMASK0); + gluechain_csr.rmwf(utra::gluechain::SFR_GCMASK_CR_GCMASK0_CR_GCMASK0, bar); + let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCMASK_CR_GCMASK0_CR_GCMASK0, bar); + baz |= gluechain_csr.ms(utra::gluechain::SFR_GCMASK_CR_GCMASK0_CR_GCMASK0, 1); + gluechain_csr.wfo(utra::gluechain::SFR_GCMASK_CR_GCMASK0_CR_GCMASK0, baz); - let foo = gluechain_csr.r(utra::gluechain::SFR_GCSR); - gluechain_csr.wo(utra::gluechain::SFR_GCSR, foo); - let bar = gluechain_csr.rf(utra::gluechain::SFR_GCSR_GLUEREG); - gluechain_csr.rmwf(utra::gluechain::SFR_GCSR_GLUEREG, bar); - let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCSR_GLUEREG, bar); - baz |= gluechain_csr.ms(utra::gluechain::SFR_GCSR_GLUEREG, 1); - gluechain_csr.wfo(utra::gluechain::SFR_GCSR_GLUEREG, baz); + let foo = gluechain_csr.r(utra::gluechain::SFR_GCSR_GLUEREG0); + gluechain_csr.wo(utra::gluechain::SFR_GCSR_GLUEREG0, foo); + let bar = gluechain_csr.rf(utra::gluechain::SFR_GCSR_GLUEREG0_GLUEREG0); + gluechain_csr.rmwf(utra::gluechain::SFR_GCSR_GLUEREG0_GLUEREG0, bar); + let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCSR_GLUEREG0_GLUEREG0, bar); + baz |= gluechain_csr.ms(utra::gluechain::SFR_GCSR_GLUEREG0_GLUEREG0, 1); + gluechain_csr.wfo(utra::gluechain::SFR_GCSR_GLUEREG0_GLUEREG0, baz); - let foo = gluechain_csr.r(utra::gluechain::SFR_GCRST); - gluechain_csr.wo(utra::gluechain::SFR_GCRST, foo); - let bar = gluechain_csr.rf(utra::gluechain::SFR_GCRST_GLUERST); - gluechain_csr.rmwf(utra::gluechain::SFR_GCRST_GLUERST, bar); - let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCRST_GLUERST, bar); - baz |= gluechain_csr.ms(utra::gluechain::SFR_GCRST_GLUERST, 1); - gluechain_csr.wfo(utra::gluechain::SFR_GCRST_GLUERST, baz); + let foo = gluechain_csr.r(utra::gluechain::SFR_GCRST_GLUERST0); + gluechain_csr.wo(utra::gluechain::SFR_GCRST_GLUERST0, foo); + let bar = gluechain_csr.rf(utra::gluechain::SFR_GCRST_GLUERST0_GLUERST0); + gluechain_csr.rmwf(utra::gluechain::SFR_GCRST_GLUERST0_GLUERST0, bar); + let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCRST_GLUERST0_GLUERST0, bar); + baz |= gluechain_csr.ms(utra::gluechain::SFR_GCRST_GLUERST0_GLUERST0, 1); + gluechain_csr.wfo(utra::gluechain::SFR_GCRST_GLUERST0_GLUERST0, baz); - let foo = gluechain_csr.r(utra::gluechain::SFR_GCTEST); - gluechain_csr.wo(utra::gluechain::SFR_GCTEST, foo); - let bar = gluechain_csr.rf(utra::gluechain::SFR_GCTEST_GLUETEST); - gluechain_csr.rmwf(utra::gluechain::SFR_GCTEST_GLUETEST, bar); - let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCTEST_GLUETEST, bar); - baz |= gluechain_csr.ms(utra::gluechain::SFR_GCTEST_GLUETEST, 1); - gluechain_csr.wfo(utra::gluechain::SFR_GCTEST_GLUETEST, baz); + let foo = gluechain_csr.r(utra::gluechain::SFR_GCTEST_GLUETEST0); + gluechain_csr.wo(utra::gluechain::SFR_GCTEST_GLUETEST0, foo); + let bar = gluechain_csr.rf(utra::gluechain::SFR_GCTEST_GLUETEST0_GLUETEST0); + gluechain_csr.rmwf(utra::gluechain::SFR_GCTEST_GLUETEST0_GLUETEST0, bar); + let mut baz = gluechain_csr.zf(utra::gluechain::SFR_GCTEST_GLUETEST0_GLUETEST0, bar); + baz |= gluechain_csr.ms(utra::gluechain::SFR_GCTEST_GLUETEST0_GLUETEST0, 1); + gluechain_csr.wfo(utra::gluechain::SFR_GCTEST_GLUETEST0_GLUETEST0, baz); } #[test] @@ -17100,38 +17299,6 @@ mod tests { let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, bar); baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, 1); mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, baz); - - let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR4); - mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR4, foo); - let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4); - mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, bar); - let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, bar); - baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, 1); - mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, baz); - - let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR5); - mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR5, foo); - let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5); - mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, bar); - let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, bar); - baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, 1); - mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, baz); - - let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR6); - mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR6, foo); - let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6); - mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, bar); - let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, bar); - baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, 1); - mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, baz); - - let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR7); - mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR7, foo); - let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7); - mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, bar); - let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, bar); - baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, 1); - mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, baz); } #[test] @@ -17370,13 +17537,23 @@ mod tests { use super::*; let mut ao_sysctrl_csr = CSR::new(HW_AO_SYSCTRL_BASE as *mut u32); - let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_CLK32KSEL); - ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_CLK32KSEL, foo); - let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL); - ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, bar); - let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, bar); - baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, 1); - ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, baz); + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_CR); + ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_CR, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CR_CLK32KSELREG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CR_CLK32KSELREG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CR_CLK32KSELREG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CR_CLK32KSELREG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CR_CLK32KSELREG, baz); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CR_PDISOEN); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CR_PDISOEN, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CR_PDISOEN, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CR_PDISOEN, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CR_PDISOEN, baz); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CR_PCLKICG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CR_PCLKICG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CR_PCLKICG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CR_PCLKICG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CR_PCLKICG, baz); let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_CLK1HZFD); ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_CLK1HZFD, foo); @@ -17407,13 +17584,13 @@ mod tests { baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, 1); ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, baz); - let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCR); - ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCR, foo); - let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR); - ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, bar); - let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, bar); - baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, 1); - ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, baz); + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCSR); + ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCSR, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUCSR_PMUCRREG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUCSR_PMUCRREG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUCSR_PMUCRREG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCSR_PMUCRREG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCSR_PMUCRREG, baz); let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCRLP); ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCRLP, foo); @@ -17431,29 +17608,29 @@ mod tests { baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, 1); ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, baz); - let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUDFT); - ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUDFT, foo); - let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT); - ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, bar); - let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, bar); - baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, 1); - ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, baz); + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUDFTSR); + ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUDFTSR, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUDFTSR_PMUDFTREG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUDFTSR_PMUDFTREG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUDFTSR_PMUDFTREG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUDFTSR_PMUDFTREG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUDFTSR_PMUDFTREG, baz); - let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM0); - ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM0, foo); - let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM); - ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, bar); - let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, bar); - baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, 1); - ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, baz); + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM0CSR); + ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM0CSR, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM0CSR_PMUTRMREG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM0CSR_PMUTRMREG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM0CSR_PMUTRMREG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM0CSR_PMUTRMREG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM0CSR_PMUTRMREG, baz); - let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM1); - ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM1, foo); - let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM); - ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, bar); - let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, bar); - baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, 1); - ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, baz); + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM1CSR); + ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM1CSR, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM1CSR_PMUTRMREG); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM1CSR_PMUTRMREG, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM1CSR_PMUTRMREG, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM1CSR_PMUTRMREG, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM1CSR_PMUTRMREG, baz); let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRMLP0); ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRMLP0, foo); @@ -17546,6 +17723,14 @@ mod tests { let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_IOX_SFR_IOX, bar); baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_IOX_SFR_IOX, 1); ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_IOX_SFR_IOX, baz); + + let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_AOPADPU); + ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_AOPADPU, foo); + let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_AOPADPU_SFR_AOPADPU); + ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_AOPADPU_SFR_AOPADPU, bar); + let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_AOPADPU_SFR_AOPADPU, bar); + baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_AOPADPU_SFR_AOPADPU, 1); + ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_AOPADPU_SFR_AOPADPU, baz); } #[test]