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frequency now confirmed
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@ -78,8 +78,6 @@ pub const FB_WIDTH_PIXELS: usize = WIDTH as usize;
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pub const FB_LINES: usize = LINES as usize;
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pub const FB_SIZE: usize = FB_WIDTH_WORDS * FB_LINES; // 44 bytes by 536 lines
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// TODO: need to confirm actual clock sent to UDMA block, but empirically, this is what I see
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// on the FPGA emulator
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const CONFIG_CLOCK_FREQUENCY: u32 = 50_000_000;
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const SPI_CS_PIN: u8 = 10;
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